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Visitor kfirg
Visitor
8,310 Views
Registered: ‎09-09-2014

PetaLinux v2014.2 using axi fifo

Hello,
I'm working with the Zynq zc706 evaluation kit from xilinx.
I'm trying to communicate with my PL using an AXI4-Stream from my PS. I generated a DTS file using the petalinux-config utility. The generated DTS contains an entry on my fifo:
axi_fifo_mm_s_0: axi-fifo-mm-s@43c00000 {
compatible: "xlnx,axi-fifo-mm-s-4.0"
....

I wasn't able to find a driver that corresponds with that compatible string. I've tested the fifo manually using devmem by following PG080 from xilinx and the fifo works. Also i've found code that was generated to access the fifo in the fsbl. But still, nothing for Linux (kernel module that will allow me to communicate with the fifo).

Currently I'm considering two options:
1) write my own char device that will wrap the code from the FSBL
2) write my own driver by following PG080 - not based on the generated code.

I believe that both of these options aren't optimal and would like to get some help as for what is the correct way to do it..

Thanks in advance,
Kfir
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3 Replies
Xilinx Employee
Xilinx Employee
8,302 Views
Registered: ‎09-10-2008

Re: PetaLinux v2014.2 using axi fifo

Hi Kfir,

Just thinking out loud here....

I doubt there is a driver for that core as it's typically used behind the scenes in a system with some other higher level core, like with AXI Ethernet when there is no DMA.

You didn't say what you are trying to do with the core in a bigger system picture.

I don't think there's anything wrong with a char mode driver other than if you have some performance criteria that may not be do-able.

With char drivers, unless you do an mmap() into user space, there's likely to be a copy of data from user space to kernel space and the other way too.

You could also consider using the UIO framework but I don't think there's much advantage if you know the kernel well enough to write a decent kernel module. Interrupts are do-able but not as good if you have fast ones IMHO.

Thanks,
John
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Visitor kfirg
Visitor
8,294 Views
Registered: ‎09-09-2014

Re: PetaLinux v2014.2 using axi fifo

Hi,
First of all thanks for the fast reply.
I would like to use my AXI fifo to communicate with the PL, namely send/recv buffers of data.I was looking for the simplest way to do it. I guess I could use the dma for the task as well.
Will I need to change something in the PL for that ? And how can use it ? (Examples would be nice)

Thanks in advance,
Kfir
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Xilinx Employee
Xilinx Employee
8,282 Views
Registered: ‎09-10-2008

Re: PetaLinux v2014.2 using axi fifo

I'm not trying to talk you into DMA if you don't need it. It's all about how much data to move and do you need to offload the CPU or not. If the CPU has not much to do then using the CPU to talk to the AXI FIFO may be the simplest solution.

I did forget to mention that using UIO is pretty efficient as there's no system calls to do I/O even though interrupts are not very efficient. If you're interested in UIO I have a pdf I did on that too that I thought I attached to a thread here but can't find it now.

Yes you need to put an AXI DMA into the PL design. It uses streams so that your IP would need to be stream based.

http://forums.xilinx.com/t5/Embedded-Linux/AXI-DMA-with-Zynq-Running-Linux/m-p/522755/highlight/true#M10649

I attached PDFs about using DMA to that thread.

Thanks
John
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