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user@moduleus
Contributor
Contributor
1,210 Views
Registered: ‎12-05-2017

Petalinux 2017.4 boot failures

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Hi,

 

I have upgraded my Vivado et PetaLinux desgin from 2017.3 to 2017.4 and I get troubles while Linux is booting. With the .3 design, the booting process was working pretty good and with the .4 upgraded version, I get the following logs (and the kernek booting process doesn't finish).

 

I see a similar topic about this issue (https://forums.xilinx.com/t5/Embedded-Linux/bootconsole-earlycon0-disabled/td-p/749273) which is marked as solved but, for me, there is not true solution into this last...

 

Does anyone have any suggestion? Should I downgrade my design to the .3 version?

 

 Logs:

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0x0
Linux version 4.9.0-xilinx-v2017.4 (jc@localhost.localdomain) (gcc version 6.2.1 20161016 (Linaro GCC 6.2-2016.11) ) #1 SMP PREEMPT Mon Mar 19 16:21:14 CET 2018
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt:Machine model: xlnx,zynq-7000
earlycon: cdns0 at MMIO 0xe0001000 (options '115200n8')
bootconsole [cdns0] enabled
Booting Linux on physical CPU 0x0
Linux version 4.9.0-xilinx-v2017.4 (jc@localhost.localdomain) (gcc version 6.2.1 20161016 (Linaro GCC 6.2-2016.11) ) #1 SMP PREEMPT Mon Mar 19 16:21:14 CET 2018
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt:Machine model: xlnx,zynq-7000
earlycon: cdns0 at MMIO 0xe0001000 (options '115200n8')
bootconsole [cdns0] enabled
bootconsole [earlycon0] enabled
bootconsole [earlycon0] enabled
cma: Reserved 28 MiB at 0x1e400000
cma: Reserved 28 MiB at 0x1e400000
Memory policy: Data cache writealloc
Memory policy: Data cache writealloc
percpu: Embedded 14 pages/cpu @ddfc2000 s25932 r8192 d23220 u57344
percpu: Embedded 14 pages/cpu @ddfc2000 s25932 r8192 d23220 u57344
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 130048
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 130048
Kernel command line: earlycon console=ttyPS0,115200 earlyprintk cma=25M
Kernel command line: earlycon console=ttyPS0,115200 earlyprintk cma=25M
PID hash table entries: 2048 (order: 1, 8192 bytes)
PID hash table entries: 2048 (order: 1, 8192 bytes)
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Memory: 475112K/524288K available (6144K kernel code, 200K rwdata, 1464K rodata, 1024K init, 229K bss, 20504K reserved, 28672K cma-reserved, 0K highmem)
Memory: 475112K/524288K available (6144K kernel code, 200K rwdata, 1464K rodata, 1024K init, 229K bss, 20504K reserved, 28672K cma-reserved, 0K highmem)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xe0800000 - 0xff800000 ( 496 MB)
lowmem : 0xc0000000 - 0xe0000000 ( 512 MB)
pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
.text : 0xc0008000 - 0xc0700000 (7136 kB)
.init : 0xc0900000 - 0xc0a00000 (1024 kB)
.data : 0xc0a00000 - 0xc0a32000 ( 200 kB)
.bss : 0xc0a32000 - 0xc0a6b698 ( 230 kB)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xe0800000 - 0xff800000 ( 496 MB)
lowmem : 0xc0000000 - 0xe0000000 ( 512 MB)
pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
.text : 0xc0008000 - 0xc0700000 (7136 kB)
.init : 0xc0900000 - 0xc0a00000 (1024 kB)
.data : 0xc0a00000 - 0xc0a32000 ( 200 kB)
.bss : 0xc0a32000 - 0xc0a6b698 ( 230 kB)
Preemptible hierarchical RCU implementation.
Preemptible hierarchical RCU implementation.
Build-time adjustment of leaf fanout to 32.
Build-time adjustment of leaf fanout to 32.
RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2
RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2
NR_IRQS:16 nr_irqs:16 16
NR_IRQS:16 nr_irqs:16 16
efuse mapped to e0800000
efuse mapped to e0800000
slcr mapped to e0802000
slcr mapped to e0802000
L2C: platform modifies aux control register: 0x02060000 -> 0x32460000
L2C: platform modifies aux control register: 0x02060000 -> 0x32460000
L2C: DT/platform modifies aux control register: 0x02060000 -> 0x32460000
L2C: DT/platform modifies aux control register: 0x02060000 -> 0x32460000
L2C-310 erratumL2C-310 erratum 769419 769419 enabled
enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x46460001
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x46460001
zynq_clock_init: clkc starts at e0802100
zynq_clock_init: clkc starts at e0802100
Zynq clock init
Zynq clock init
sched_clock: 64 bits at 400MHz, resolution 2ns, wraps every 4398046511103ns
sched_clock: 64 bits at 400MHz, resolution 2ns, wraps every 4398046511103ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x5c4093a7d1, max_idle_ns: 440795210635 ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x5c4093a7d1, max_idle_ns: 440795210635 ns
Switching to timer-based delay loop, resolution 2ns
Switching to timer-based delay loop, resolution 2ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 447945978 ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 447945978 ns
timer #0 at e080a000, irq=17
timer #0 at e080a000, irq=17
Console: colour dummy device 80x30
Console: colour dummy device 80x30
Calibrating delay loop (skipped), value calculated using timer frequency.. Calibrating delay loop (skipped), value calculated using timer frequency.. 800.00 BogoMIPS (lpj=4000000)
800.00 BogoMIPS (lpj=4000000)
pid_max: default: 32768 minimum: 301
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
CPU: Testing write buffer coherency: CPU: Testing write buffer coherency: ok
ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x100000 - 0x100058
Setting up static identity map for 0x100000 - 0x100058
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
Brought up 2 CPUs
Brought up 2 CPUs
SMP: Total of 2 processors activated (1600.00 BogoMIPS).
SMP: Total of 2 processors activated (1600.00 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
devtmpfs: initialized
VFP support v0.3: VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
pinctrl core: initialized pinctrl subsystem
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor menu
cpuidle: using governor menu
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xe0840000
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xe0840000
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
e0000000.serial: ttyPS1 at MMIO 0xe0000000 (irq = 26, base_baud = 6250000) is a xuartps
e0000000.serial: ttyPS1 at MMIO 0xe0000000 (irq = 26, base_baud = 6250000) is a xuartps
e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 27, base_baud = 6250000) is a xuartps
e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 27, base_baud = 6250000) is a xuartps
p��k����[ttyPS0] enabled
console [ttyPS0] enabled
console [ttyPS0] enabled
bootconsole [cdns0] disabled
bootconsole [cdns0] disabled
bootconsole [cdns0] disabled
bootconsole [earlycon0] disabled
bootconsole [earlycon0] disabled

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user@moduleus
Contributor
Contributor
1,469 Views
Registered: ‎12-05-2017

Hi,

 

The problem was solved by restarting a PetaLinux from scratch.

View solution in original post

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sandeepg
Moderator
Moderator
1,147 Views
Registered: ‎04-24-2017

Hi user@moduleus,

 

Looks like your device-tree nodes(serial) for kernel bootargs doesn't seem to be correct.

 

Can you post you dts content?

 

Thanks,
Sandeep
PetaLinux Yocto | Embedded SW Support

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user@moduleus
Contributor
Contributor
1,470 Views
Registered: ‎12-05-2017

Hi,

 

The problem was solved by restarting a PetaLinux from scratch.

View solution in original post

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