cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Visitor
Visitor
465 Views
Registered: ‎04-27-2020

Petalinux device tree build error for simple AXI GPIO implementation

Jump to solution

I am just wanting to learn how to create and build a petalinux project by just creating a simple GPIO PL implementation on the Ultra96v2, but I am running into problems when building the petalinux project. Specifically, I have come across a syntax error for the generated PL DTSI file.

I have previously successfully built the petalinux project straight from the ultra96v2_oob_2019_2.bsp without any configuration on my end. I have searched the community without much avail - either didn't apply or I didn't understand what exactly to do to fix the issues. The process I have taken are the following:

I have created a simple block design for the ultra96v2 with just an AXI GPIO with supporting IP.

Screenshot from 2020-07-23 11-18-46.png

I generated the bitstream and xsa files.

I then create the petalinux project from the ultra96v2 2019.2 BSP (using 2019.2 tools), configure it using the XSA file (with bitstream), and build it:

petalinux-create -t project -s hw/ultra96v2_oob_2019_2.bsp --name petalinux
cd petalinux petalinux-config --get-hw-description ..hw/ petalinux-build

And I get this error for the pl dtsi file

Subprocess output:
Error: /home/paul/Git/Ultra96v2-Blinky/petalinux/build/../components/plnx_workspace/device-tree/device-tree/pl.dtsi:6.1-2 syntax error
FATAL ERROR: Unable to parse input tree

pl.dtsi

/*
 * CAUTION: This file is automatically generated by Xilinx.
 * Version:  
 * Today is: Thu Jul 23 14:50:36 2020
 */
/{
	amba_pl: amba_pl@0 {
		#address-cells = <2>;
		#size-cells = <2>;
		compatible = "simple-bus";
		ranges ;
		axi_gpio_0: gpio@a0000000 {
			#gpio-cells = <3>;
			clock-names = "s_axi_aclk";
			clocks = <&zynqmp_clk 71>;
			compatible = "xlnx,axi-gpio-2.0", "xlnx,xps-gpio-1.00.a";
			gpio-controller ;
			reg = <0x0 0xa0000000 0x0 0x80>;
			xlnx,all-inputs = <0x0>;
			xlnx,all-inputs-2 = <0x0>;
			xlnx,all-outputs = <0x1>;
			xlnx,all-outputs-2 = <0x0>;
			xlnx,dout-default = <0x00000000>;
			xlnx,dout-default-2 = <0x00000000>;
			xlnx,gpio-width = <0x2>;
			xlnx,gpio2-width = <0x20>;
			xlnx,interrupt-present = <0x0>;
			xlnx,is-dual = <0x0>;
			xlnx,tri-default = <0xFFFFFFFF>;
			xlnx,tri-default-2 = <0xFFFFFFFF>;
		};
	};
};

system-top.dtsi

/*
 * CAUTION: This file is automatically generated by Xilinx.
 * Version:  
 * Today is: Thu Jul 23 14:50:36 2020
 */


/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
#include "pl.dtsi"
#include "pcw.dtsi"
#include "avnet-ultra96-rev1.dtsi"
/ {
	chosen {
		bootargs = "earlycon clk_ignore_unused";
		stdout-path = "serial0:115200n8";
	};
	aliases {
		i2c0 = &i2c1;
		serial0 = &uart1;
		serial1 = &uart0;
		spi0 = &spi0;
		spi1 = &spi1;
	};
	memory {
		device_type = "memory";
		reg = <0x0 0x0 0x0 0x7ff00000>;
	};
};
#include "system-user.dtsi"

I don't know how to fix the syntax error and I don't know how to even go about fixing this problem. Any help would be much appreciated. I really don't understand where I could have gone wrong. I have tried to attach the dtsi and xsa files but for some reason it wouldn't let me when submitting this post.

0 Kudos
1 Solution

Accepted Solutions
Highlighted
Xilinx Employee
Xilinx Employee
340 Views
Registered: ‎09-17-2019

Hi @pmw,

I created a project using your XSA and I am not seeing any issue on our end and I used Xilinx provided BSP xilinx-ultra96-reva-2019.2.
Please check the attached build log.

Thanks & Regards,
Shubhangi

View solution in original post

5 Replies
Highlighted
Xilinx Employee
Xilinx Employee
401 Views
Registered: ‎11-05-2019

 

Hi @pmw 

I created a BD similar to yours and tried it out, and it built with no problems.

If you can share the XSA, we can try it.

Thank you


Please mark the Answer as Accept as Solution if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.

Highlighted
Visitor
Visitor
381 Views
Registered: ‎04-27-2020

Whenever I try to attach a file, I get an error similar to the following error: "The attachment's blinky.xsa content type (application/octet-stream) does not match its file extension and has been removed."

0 Kudos
Highlighted
Visitor
Visitor
378 Views
Registered: ‎04-27-2020
Here is the repo to this project. The XSA file is under the "hw" directory.
https://github.com/paulwood15/Ultra96v2-Blinky
0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
341 Views
Registered: ‎09-17-2019

Hi @pmw,

I created a project using your XSA and I am not seeing any issue on our end and I used Xilinx provided BSP xilinx-ultra96-reva-2019.2.
Please check the attached build log.

Thanks & Regards,
Shubhangi

View solution in original post

Highlighted
Visitor
Visitor
322 Views
Registered: ‎04-27-2020

Thank you. For whatever reason, deleting the current project and starting over from scratch fixed whatever the problem was. The original project was the same just without the XSA to test out building with petalinux. Then, I configured the project to use the XSA. What should I do next time so I don't have to entirely delete the project if I want to reconfigure it?

0 Kudos