cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
12,281 Views
Registered: ‎09-26-2014

Petalinux driver for AXI Interrupt Controller core

Jump to solution

Hello,

 

We are creating a design using the Zynq on a ZC702 board running Petalinux 2014.2. We have used up all 16 of the F2S PL-to-PS interrupts, and we are needing to add more. So, we would like to add a AXI Interrupt Controller v4.1 IP to the PL. But we we don't know what, if any, Petalinux driver is available to use with this core.

 

We are unsure how to interpret the "Interrupt Controller" listing on the Xilinx Linux Drivers wiki page. Is it saying that one of the generic interrupt drivers provided with Petalinux will support the AXI Interrupt Controller core? What should we use for the compatibility string in the device tree?

 

Best,

Brady

1 Solution

Accepted Solutions
linnj
Xilinx Employee
Xilinx Employee
18,687 Views
Registered: ‎09-10-2008

Hi,

 

I think you may be going into uncharted waters (from what I know) and there may be some work to get it all working, but it may be pretty easy depending on your kernel skills.  I'm no expert on this for sure.

 

The AXI interrupt controller could be cascaded off the GIC controller and then the interrupt handler for the AXI intc would then have to be called from the GIC controller.  At least that's one way to do it.

 

The AXI interrupt controller that was referenced on the wiki page is used with MicroBlaze so it has a lot of past use, but not connected to the ARM GIC as an extended interrupt controller.  The biggest stumbling block right off is that it's not setup as an irqchip driver (https://github.com/Xilinx/linux-xlnx/tree/master/drivers/irqchip) to be used outside of a MicroBlaze kernel build.

 

You can see where it's located, https://github.com/Xilinx/linux-xlnx/blob/master/arch/microblaze/kernel/intc.c, is down inside the MicroBlaze arch directory.

 

It may still be useable where it is but that's not clear to me. It is using the device tree and you can see what appears to be the compatible string at the end of this driver (IRQCHIP_DECLARE(xilinx_intc, "xlnx,xps-intc-1.00.a", xilinx_intc_of_init);). This appears to be a bit different to me than normal drivers.  I would wonder if you couldn't build a kernel module with a copy of that code which worked pretty easily.

 

Thanks

John

 

 

View solution in original post

11 Replies
linnj
Xilinx Employee
Xilinx Employee
18,688 Views
Registered: ‎09-10-2008

Hi,

 

I think you may be going into uncharted waters (from what I know) and there may be some work to get it all working, but it may be pretty easy depending on your kernel skills.  I'm no expert on this for sure.

 

The AXI interrupt controller could be cascaded off the GIC controller and then the interrupt handler for the AXI intc would then have to be called from the GIC controller.  At least that's one way to do it.

 

The AXI interrupt controller that was referenced on the wiki page is used with MicroBlaze so it has a lot of past use, but not connected to the ARM GIC as an extended interrupt controller.  The biggest stumbling block right off is that it's not setup as an irqchip driver (https://github.com/Xilinx/linux-xlnx/tree/master/drivers/irqchip) to be used outside of a MicroBlaze kernel build.

 

You can see where it's located, https://github.com/Xilinx/linux-xlnx/blob/master/arch/microblaze/kernel/intc.c, is down inside the MicroBlaze arch directory.

 

It may still be useable where it is but that's not clear to me. It is using the device tree and you can see what appears to be the compatible string at the end of this driver (IRQCHIP_DECLARE(xilinx_intc, "xlnx,xps-intc-1.00.a", xilinx_intc_of_init);). This appears to be a bit different to me than normal drivers.  I would wonder if you couldn't build a kernel module with a copy of that code which worked pretty easily.

 

Thanks

John

 

 

View solution in original post

12,160 Views
Registered: ‎09-26-2014

John,

 

Thank you very much for your reply. We were able to create a new AXI Interrupt Controller irqchip driver based on its Microblaze driver and several irqchip examples. It can now be set up in the device tree as a child of the GIC and used very easily.

 

Thanks again!

Brady

linnj
Xilinx Employee
Xilinx Employee
12,156 Views
Registered: ‎09-10-2008

Hi Brady,

 

Excellent news, very nice work!

 

Any chance you can share that work?

 

Thanks

John

0 Kudos
12,101 Views
Registered: ‎09-26-2014

John,

 

After we clean it up a bit, we can look into submitting it as a patch.

 

Thanks!

Brady

0 Kudos
lcameron
Adventurer
Adventurer
12,086 Views
Registered: ‎02-14-2014

Please do submit this as a patch, I need to implement the same thing soon.   Chances are if we both need it there will be others too.

 

 

Leigh

 

 

0 Kudos
linnj
Xilinx Employee
Xilinx Employee
11,573 Views
Registered: ‎09-10-2008

Hi Brady,

 

Any chance that you can provide that code as I have a use for it now?  Cleanliness is not required as I won't throw rocks I promise :)

 

Thanks

John

0 Kudos
lcameron
Adventurer
Adventurer
10,569 Views
Registered: ‎02-14-2014
0 Kudos
jamey.hicks
Observer
Observer
7,989 Views
Registered: ‎05-02-2014

I am also interested in this driver, even if it is not clean enough to submit as a patch.

 

0 Kudos
1,739 Views
Registered: ‎07-18-2019

Hi all,

Have you any the patch ? 

I'm implementing a system which contains a AXI Interrupt Controller IP core, connect to interrupt ports of 2 AXI DMA IP cores on ZC706 development board. I need some helps about Linux driver.

Could you please share your driver code ?

Thank you very much !! :)

0 Kudos
1,488 Views
Registered: ‎01-31-2019

I am having the same problem trying to make use of the AXI Interrupt Controller to increase the number of available interrupts.  It is frustrating that Xilinx provides very little help in basic usage of the IP cores.  The only example provided for AXI Interrup Controller is for use with SDK.  What about support for Petalinux?

0 Kudos
badegoke_f1
Adventurer
Adventurer
604 Views
Registered: ‎06-18-2019

Hi ,
Please has anyone used the AXI interrupt controller in 2020.1 ? I have run out of interrupt ports and there is no documentation on a work around. I am unsure what I need to do with device tree modification in Petalinux.

 

Many thanks
Bade

0 Kudos