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Registered: ‎06-06-2017

Petalinux user space application delays reading from eth0 raw ethernet messages

Hi all,

I have observed performance issues in a user space application. The set up is the following:

Board: ZCU102, Petalinux 2017.1, Vivado 2017.1 User space application in C using standard setup from SDK including pthread lib. The petalinux was created using standard setup. I.e. no addtional drivers have been added.

The application transfers data from the PL to PS which eventually are stored on the SATA drive.

More specifically it reads the output from an 4x12 bit ADC converter (which runs at 10MHz). The ADC is sychronized with raw ethernet messages that arrive at eth0 3-4ms before the valid data are produced by the ADC. For this reason the eth0 socket is set in promiscuous mode. The data from the ADC are captured in PL and transfered to the PS using the AXI DMA in simple mode on the write channel.

So the petalinux application performs the following functions:

  • Receives a raw ethernet message and commands the ADC recorder HW to read the valid data. This is done using the AXILite interface. From the user space the physical address of the AXILite interface is obtained using mmap().
    The AXI DMA data (ADC data) are transfered to user space by using again the mmap() method i.e. by accessing the AXI DMA registers from the Linux application (user space).
  • Once the data have been transfered from the DMA are stored in a binary file in tmpFS (/home/root) temporarily and as soon as the file reaches the 100MB limit is transfered to the SATA drive (512GB SSD) formated in ext4.
  • The ethernet interface and the AXI DMA interface run on separate threads which also communicate with FIFO queue. The ethernet interface thread is set to max priority, using sched_get_priority_max(SCHED_FIFO), to make sure that there no delays for the raw ethernet message to arrive at user space application from the network socket. If an ethernet message is delays to be processed by the application will cause the ADC recorder HW to record invalid data from the ADC output. The dt when an ethenet message arrives and when the valid data appear on the ADC is 3-4ms.

So it has been observed that in some situations during the file transfer from tmpFS to the SATA drive the ethernet message are delayed to arrive at the user space application causing invalid data to be recorded.

It has been observed also that in the user space application when no data are transfered to the SATA drive no delays found on the eth0 interface. Of course the solution of storing the data to the tmpFS and when the ADC data recording is finished moving the to SATA drive is no sufficient due to the limited size of tmpFS (1GB). An with the data rate 40MB/sec we would reach the limit in approx 25 sec.

Any suggestion of what might be the cause of the delays at eth0 will be appreciated.

Thanx in advance

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Registered: ‎09-26-2014

Hello. I have similar problem. In my design i get data from AXI DMA, and write this data to buffer.

After one form buffers if full i create thread, and  write data to sata SSD.

Same time, main program is delayed.  i change pri oryty but this ot help. 


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