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Participant
Participant
4,514 Views
Registered: ‎06-28-2016

Programming PL from u-boot

Hi

I'm working with a Zcu102 Evaluation Board and i have installed Petalinux on it. I'm trying to program the FPGA from the u-boot like :

 

 

tftpboot ${clobstart} ${fpga_img} // Clobstart = 0x10000000 and fpga_img = design_1_wrapper.bit.bin

fpga load 0 ${clobstart} ${filesize}

 

The led becomes green so i think it do it successfully.

When i start linux everything is ok, but the fpga is not correctly programmed. I have programmed the fpga with : petalinux-boot --jtag --kernel --fpga, and everything works perfectly, so i suppose that when i program it on the u-boot i'm not doing it correctly.

I have tried with "fpga loadb", but it only return :

fpga - loadable FPGA image support

Usage:
fpga [operation type] [device number] [image address] [image size]
fpga operations:
  dump    [dev] [address] [size]    Load device to memory buffer
  info    [dev]            list known device information
  load    [dev] [address] [size]    Load device from memory buffer
  loadb    [dev] [address] [size]    Load device from bitstream buffer (Xilinx only)

 

The info of the PL device is :

U-Boot-PetaLinux> fpga info 0
Xilinx Device
Descriptor @ 0x000000006ffab1d0
Family:            ZynqMP PL
Interface type:    csu_dma configuration interface (ZynqMP)
Device Size:       1 bytes
Cookie:            0x0 (0)
Device name:       xczu9eg
Device Function Table @ 0x000000006ff7dcf8

 

I don't know if the filed Device Size is wrong, so it's value is 1B. In addition, petalinux create on the build a bitstream.bin file, so i dont know if i have to copy this file or design_1_wrapper.bit.

 

Any idea??

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2 Replies
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Moderator
Moderator
4,456 Views
Registered: ‎09-12-2007

Re: Programming PL from u-boot

See the flow here (there is a uboot flow too)
http://www.wiki.xilinx.com/FPGA+Manager+ZCU102
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Explorer
Explorer
4,404 Views
Registered: ‎10-04-2017

Re: Programming PL from u-boot

I did this in 2015.4 and used this command to load a bit file(not a bin)

 

fpga loadb 0 ${address} 0x1

 

 The reason the size is 0x1 is because the actually size is read from the bit file's header and I just had to provide some non-zero number for the size.

 

jeff

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