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tchin123
Voyager
Voyager
379 Views
Registered: ‎05-14-2017

QSPI boot mode on zyne ultrascale+ device

To boot from QSPI boot mode on a Zynq ultrascale+ FPGA what is the required partition in my Boot Image? After power cycle, the Done bit never goes Green on the ZCU102 board.

1)  I'm have already included the FSBL.elf and bitstream file, is there any other partition?

2)  Since my design is PL only, and not using the Zynq IP in my Block Design, I have not connected anything on the IP,  is there any Zynq MPSoC IP net connection that is required? My BOOT.bin is currently about 26MB, do I need any IP to external DDR  connection?

 

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6 Replies
tchin123
Voyager
Voyager
285 Views
Registered: ‎05-14-2017

any suggestion is welcome 

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tchin123
Voyager
Voyager
265 Views
Registered: ‎05-14-2017

I'm stuck , anyone has any idea?

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joe4702
Contributor
Contributor
250 Views
Registered: ‎08-21-2012

The FSBL runs on the PS, either the A53 or R5, your choice, in OCM.

Therefore at a minimum, I assume the PS block needs to be connected to the QSPI flash.

A UART is also nice to see the FSBL boot messages.

I normally also include the PMU firmware in BOOT.bin, but I don't know if that component is required in order for FSBL to load the PL.

 

 

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tchin123
Voyager
Voyager
237 Views
Registered: ‎05-14-2017

Thanks but how about loading my PL design which is about 26 MByte in size, do I need to make any connection between Zynq+ and external DDR or can FSBL move it directly from Flash to FPGA PL section. because right now after I program my Flash from SDK and it return Flash successful Once I recycle the FPGA, the done bit LED never turn Green

Can locate any design note or guide for a PL only design for a Zynq Ultrascale+ . I have already review UG1085, UG1209, 

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tchin123
Voyager
Voyager
179 Views
Registered: ‎05-14-2017

any idea

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joe4702
Contributor
Contributor
147 Views
Registered: ‎08-21-2012

Looking at 2019.1 FSBL source, it looks like it can load PL even if PS has no DDR per this code fragment in xfsbl_partition_load.c

#ifdef XFSBL_PS_DDR
/* Use CSU DMA to load Bit stream to PL */
BitstreamWordSize =
PartitionHeader->UnEncryptedDataWordLength;

Status = XFsbl_WriteToPcap(BitstreamWordSize, (u8 *) LoadAddress);
if (Status != XFSBL_SUCCESS) {
goto END;
}
#else
/* In case of DDR less system, do the chunked transfer */
Status = XFsbl_ChunkedBSTxfer(FsblInstancePtr,
PartitionNum);
if (Status != XFSBL_SUCCESS) {
goto END;
}

#endif

.

 

 

 

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