Hello Xilinx Forums,
I am trying to implement a low power architecture design where I am using Xilinx's FPGA Manager driver in Linux Kernel to power up and down the programmable logic. I have properly exercised the power down and reprogramming bitstream, now I am having issues to reprobe the PL drivers. I am using the ZCU106 SDI TRD project.
Would the best way to reprobe drivers be achieved by creating a multi layer devicetree overlays to properly probe and release device drivers? or should I attempt a kernel module approach and modprobe/insmod each PL drive in the correct order as needed?
Thank you for any advice
