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Observer
Observer
707 Views
Registered: ‎09-08-2017

Reprogram PS side of Vivado Project from Linux

I have a problem where I need to program my vivado project from Linux.  When programmed using the FPGA Manager driver the PL side of the project appears to work, but the PS side only works when programmed from the FSBL (as the init code is included)

 

I realize that there are some things that cannot be touched that are related to the PS side that is running on linux, but I do need to be able to change a few things. The 2 that come to mind are the configurations of the clocks and AXI buses connected to the PL.  What is the easiest way to do this assuming I don't change linux or boot stuff (FSBL, U-boot)?  

 

Can I run some derivative of psu_init.c from linux?

 

thanks,

 

I am using Petalinux and 2017.1 tools  

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Observer
Observer
698 Views
Registered: ‎09-08-2017

BTW, I am using Zynq ultrascale 3eg and 6eg devices
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Xilinx Employee
Xilinx Employee
664 Views
Registered: ‎07-29-2011

Hi,

 

The preferred or recommended way to do this is to do these changes through FSBL itself

 

Regards

Madhubala

 

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