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Visitor rajathrao78
Visitor
282 Views
Registered: ‎07-19-2018

SDK Memory Tests / Zynq DRAM Tests

Hello, 

 

I am new to Xilinx Sdk and I am booting my Xilinx Ultrascale + MPSoC from the SD Card. I want to include a Dram test template from Xilinx inside my boot.bin, The contents of my boot.bin are given below.

 

the_ROM_image:
{
[fsbl_config] a53_x64
[bootloader] fsbl.elf
[pmufw_image] pmuf.elf
[destination_cpu=a53-0, exception_level=el-3, trustzone] bl31.elf
[destination_cpu=a53-0, exception_level=el-2] ddr_test.elf
}

 

NOTE : ddr_test is the name of the default xilinx dram test template.

 

However, I am getting an error like this, "XFSBL_ERROR_ADDRESS" What am i doing wrong here?

error.PNG

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1 Reply
Observer bkzshabbaz
Observer
30 Views
Registered: ‎01-25-2018

Re: SDK Memory Tests / Zynq DRAM Tests

I've been trying to do the exact same thing and I suspect it's because the DRAM test template is supposed to run out of OCM.  FSBL currently runs out of OCM and there may be an issue with this.  By all means this is just my speculation.  I'm still waiting for an authoritative answer.

If you look at xfsbl_image_header.c: 

/**
* Not a valid address
*/
Status = XFSBL_ERROR_ADDRESS;
XFsbl_Printf(DEBUG_GENERAL,
"XFSBL_ERROR_ADDRESS: %llx\n\r", Address);

0XFFFC_0000 is the address of psu_ocm_ram_0, so the FSBL may be preventing the load from clobbering itself in memory.

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