12-06-2017 01:46 AM
Hi all !
I tried to rebuild the TRD_reference Design for ZCU102 (ZynqUltrascale+ MPSoC) module by module by following the procedure explained at http://www.wiki.xilinx.com/Zynq+UltraScale+MPSoC+Base+TRD+2017.2 , but
i am unable to figured out how could we create the individual device tree files such as located in the TRD reference design directory such as :
12-06-2017 04:31 AM
There are DTG (Device tree generator) scripts in the petalinux tools that actually generates these dts/dtsi files. You dont need to bother about this. These are exported by the HDF file.
http://www.wiki.xilinx.com/Build+Device+Tree+Blob (Refer section:- Creating a Device Tree Source (.dts/.dtsi) files)
12-17-2017 09:19 PM
If the issue is resolved after following this thread, kindly select the accept this as solution button, that will stop others from responding on top of this thread