02-28-2010 12:29 PM
I am new in embedded linux and fpga fields. Now I am trying to port Linux-2.6-xlnx to Xilinx FPGA board XUPV5-LX110T which is as similar as ML505.
The basic tutorial I follow is:
1. Xilinx.wikidot.com: http://xilinx.wikidot.com/microblaze-linux
2. 'Getting started Using Git', xapp1107
I tried the best to follow the process step by step and I document it in a pdf file which is attached to this post. Although I didn't succeed since I didn't read any output from console after downloading the kernel to the board I hope this one can give a beginner a little more detail the whole procedure and get more friends to discuss about it.
At last, I'd like to give the special thanks to John Linn for helping about this.
PS: If you guys succeed in porting linux linux-2.6 to ML505 or XUP board, feel free to correct me and give me advice.
03-02-2010 08:50 AM
You're probably going to have better luck if you state your issue rather than giving a big pdf for people to drag thru.
It appears to me that you have system problems such that you should start using the system with stand alone mode (no OS) first to get yourself more familiar with how things work. Then move to Linux. An OS just makes problems harder when you don't know exactly what you're doing.
There should be EDK tutorials that will help.
03-02-2010 09:33 AM
This appears to be a fundamental problem with the hardware, in that you cannot connect to the MDM.
I would echo John's point. It is essential to be able to run "hello world" and a memory test application the hardware to ensure that the basics are good before progressing to generate a linux kernel.
Check your clocks and resets - these are common causes for not being able to connect to the MDM. Of course, also ensure that the FPGA is programmed correctly, and that done has gone high.
03-02-2010 11:36 AM
I think I forget to update the pdf after editing in MS word. Please read the the updated Part 2 -- Step 5 in the attachment. I can get the 'hello world', memory test, peripharel test runing (result in console) by downloading the relative elf files to the board which is set to bootloop at reset.
Step5 –loading the kernel using a Xilinx Probe
First, download the bit stream to the board via impact/XPS. (In our case, ‘try.bit’ in implementation) After that, in XMD, type: xmd> connect mb mdm
It will give you a list of information as below:
XMD% connect mb mdm
Info:AutoDetecting cable. Please wait.
Info:Reusing A003FE81 key.
Info:Reusing 2403FE81 key.
Info: OS platform = i686.
Info:Connecting to cable (Usb Port - USB21).
Info:Checking cable driver.
Info:Overriding Xilinx file <> with local file
Info:File version of /usr/share/xusbdfwu.hex = 1030.
Info: Using libusb.
Info: Max current requested during enumeration is 74 mA.
Info:Type = 0x0004.
Info: Cable Type = 3, Revision = 0.
Info: Setting cable speed to 6 MHz.
Info:Cable connection established.
Info:Firmware version = 1303.
Info:File version of /export/home/opt/Xillinx/11.1/ISE/data/xusb_xlp.hex =
Info:Firmware hex file version = 1303.
Info:PLD file version = 0012h.
Info: PLD version = 0012h.
Info:Type = 0x0004.
Info:ESN option: 0000116FF96501.
JTAG chain configuration
Device ID Code IR Length Part Name
1 f5059093 16 XCF32P
2 f5059093 16 XCF32P
3 59608093 8 XC9500XL
4 0a001093 8 System_ACE_CF
5 72ad6093 10 XC5VLX110T
MicroBlaze Processor Configuration :
No of PC Breakpoints...............1
No of Read Addr/Data Watchpoints...0
No of Write Addr/Data Watchpoints..0
Instruction Cache Support..........on
Instruction Cache Base Address.....0x8a400000
Instruction Cache High Address.....0x8a4fffff
Data Cache Support.................on
Data Cache Base Address............0x8a400000
Data Cache High Address............0x8a4fffff
Hard Divider Support...............off
Hard Multiplier Support............on - (Mul32)
Barrel Shifter Support.............off
MSR clr/set Instruction Support....on
Compare Instruction Support........on
Data Cache Write-back Support......off
Connected to "mb" target. id = 0
Starting GDB server for "mb" target (id = 0) at TCP port no 1234
According to advice of John Linn, you need to check the ‘Instruction Cache Base Address’ and configure the kernel manually for the item ‘Physical address where Linux kernel is’
Then you can download your image to your board:
XMD% dow linux-2.6-xlnx.git/arch/microblaze/boot/simpleImage.xilinx
System Reset .... DONE
Downloading Program --
section, .text: 0xc0000000-0xc02a6cb7
section, .ref.text: 0xc02a6cb8-0xc02a7a13
section, .init.text: 0xc0364000-0xc038237b
section, .init.ivt: 0xc038547c-0xc03854e3
section, __fdt_blob: 0xc02a7a14-0xc02aba13
section, .rodata: 0xc02ac000-0xc033926f
section, __ksymtab: 0xc0339270-0xc033d357
section, __ksymtab_gpl: 0xc033d358-0xc033eeb7
section, __ksymtab_strings: 0xc033eeb8-0xc034b497
section, __param: 0xc034b498-0xc034bfff
section, __ex_table: 0xc034c000-0xc034cd9f
section, .sdata2: 0xc034cda0-0xc034cfff
section, .data: 0xc034d000-0xc0362e7f
section, .init.data: 0xc038237c-0xc038547b
section, .init.setup: 0xc03854e4-0xc0385783
section, .initcall.init: 0xc0385784-0xc03859ab
section, .con_initcall.init: 0xc03859ac-0xc03859b3
section, .init.ramfs: 0xc0386000-0xc044d5cb
section, .bss: 0xc044e000-0xc047bd2f
Setting PC with Program Start Address 0x8a400000
But when I type ‘con’ in XMD window, no message pop out showing the kernel starts.
I mark the 'microblaze_0_bootloop' to initialize BRAM, then generate the bit stream(.bit) and device-tree file(.dts). I can successfully download the elf of 'TestApp_Memory_microblaze_0' & 'TestApp_peripheral_microblaze_0' and get the testing output at HyperTerminal.
I also change the kernel configuration 'Physical address where kernel is' to the base address of my instruction cache following John Linn's advice.Now I can download kernel but no reponse showing at the Minicom.
Now I am trying to build a minimun hardware structure to have a try. I will let you know if there is any progress.