10-15-2017 07:11 AM
Is it possible to turn off PL using sysfs interface?
I found out the following file /sys/kernel/debug/zynqmp_pm/power which allows to turn off PS (echo system_shutdown 1 2 > /sys/kernel/debug/zynqmp_pm/power) however I'm don't know if PL can be turned off from it.
Can someone enlighten me?
If it can't be done using sysfs, how can I turn off PL?
Thanks a lot,
10-15-2017 08:10 AM
No way to turn OFF the PL,
The device will draw static power as long as powered on. You can reduce power in your design for the PL by gating the clocks. That is about it.
My best advice: use bothg PS and PL wisely (as much as possible) to get best efficiency (most work possible done for the power).
Your only real choice for less power is to go with a smaller device.
10-16-2017 01:20 AM
I there were some inaccuracies in my question so let me try and clarify.
I might have some more inaccuracies as I'm newbie in this area.
I'k working with zcu102 evaluation board and trying to measure how long will it take to exit low power mode (PL is off) and load firmware from a Linux running on the APU.
To achieve that, I plan to
1) Turn off PL (from Linux)
2) Turn on PL (from Linux)
3) Load firmware (from Linux)
In order to do that I've found that I can turn off the PL with the following command:
echo force_powerdown 9 > /sys/kernel/debug/zynqmp_pm/power
I also found some reference which shows how to load firmware using sysfs, something like:
echo firmware_file.bin > /sys/class/fpga_manager/fpga0/firmware
So, in order to measure the time from PL off to PL on and running I'm performing the following sequence
1) echo force_powerdown 9 > /sys/kernel/debug/zynqmp_pm/power
2) echo firmware_file.bin > /sys/class/fpga_manager/fpga0/firmware
3) echo firmware_file.bin > /sys/class/fpga_manager/fpga0/firmware
I run the the "echo firmware_file.bin > /sys/class/fpga_manager/fpga0/firmware" command twice because I don't know how to turn PL on from command line in another way. I've found that on the first time I run it, the PL powers on and on the second time it loads the firmware to the FPGA.
But I'm not sure I'm doing things right and there might be other ways to do that.
Can you advise on it?
I have some questions if it's OK.
1) I don't know how to issue turn on PL command from Linux. Is it possible?
2) After the sequence shown above, I'm trying to power off the PL again but it doesn't work. Can you please check it?
3) Do you have some time measurements which tell how long does this process (described at the beginning of this mail) should take? I've measured ~110 milliseconds from PL on until PL is ready (I still have to measure the time from issuing the PL on command until it is actually on).
10-16-2017 07:01 AM
You are confused,
There is no power control for the PL excepting the design you place there.
The PMU in the PS controls power for the PS: the low power domain (R5's), and the high performance domain (A53's).
10-29-2017 12:09 AM
I don't understand your answer.
You say that it is not possible to cut the power supply to the PL on the zcu102 evaluation board?
When I send the force_shutdown command using sysfs I see the that DS7 led turns from green to off and checking the voltage on J35 show 0.
How do you explain it?
10-29-2017 08:43 AM
I do not know,
I am nowhere near the schematics, so I do not know what DS7 is (does, indicates),
I suppose you could turn off the PL power supplies, but there is no 'switch' internal to the device to do that.