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Visitor smcb_dnae
Visitor
2,758 Views
Registered: ‎09-08-2017

Two Ethernet ports sharing MDIO & MDC on Zynq

Hi,

 

We've designed a custom Zynq board with 2 Ethernet ports which share MDIO, MDC and RSTN lines to the PHYs. The Zynq is running PetaLinux.

 

The Vivado project does now allow sharing of MDIO signals across the two ports so currently, Eth0 has the MDIO enabled and configured, while Eth1 does not. Needless to say we are having trouble bringing up the ports.

 

In theory, the PHY connectivity should be workable, but is there anything fundamentally incompatible with Zynq/PetaLinux operation in this setup? If not, has anyone succeeded in getting this to work, and if so, how?

 

Thanks.

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7 Replies
Explorer
Explorer
2,736 Views
Registered: ‎04-12-2017

Re: Two Ethernet ports sharing MDIO & MDC on Zynq

MDIO is a bidirectional port. Maybe I am mistaken, but I find it difficult to see how you can share a bidirectional port.

Avi Chami MSc
FPGA Site
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Scholar dpaul24
Scholar
2,734 Views
Registered: ‎08-07-2014

Re: Two Ethernet ports sharing MDIO & MDC on Zynq

Hi,

 

The Vivado project does now allow sharing of MDIO signals across the two ports so currently, Eth0 has the MDIO enabled and configured, while Eth1 does not. Needless to say we are having trouble bringing up the ports.

 

That's true, but you can have a little piece of custom logic added near/at the FPGA peripherals so as to configure multiple PHYs. I had written a small piece of code for controlling multiple Marvell RGMII PHYs. The phy_sel_i can be expanded to control more PHYs. Note that only 1 PHY at a time can be configured this way.

 

You might find it useful.

 

 

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity mux_phy_mgmt is 
  Port (
  glbl_rst_i    : in std_logic; 
  -- Generic MD* signals (probably from a state-machine)
  gpio_mdc_i      : in std_logic; 
  gpio_mdio_io    : inout std_logic;
  gpio_mdio_dir_i : in std_logic;
  phy_sel_i       : in std_logic_vector(1 downto 0) -- This signals will tell you which PHY to be driven  
  -- PHY0 i/f
  phy0_mdc_o    : out std_logic; 
  phy0_mdio_io  : inout std_logic; 
  phy0_rstn_o   : out std_logic;
  -- PHY1 i/f
  phy1_mdc_o    : out std_logic; 
  phy1_mdio_io  : inout std_logic; 
  phy1_rstn_o   : out std_logic   
  );
end mux_phy_mgmt;

architecture mux_phy_mgmt_arc of mux_phy_mgmt is 
  
  begin  
 
  -- generate active LOW resets
  phy0_rstn_o <= not(glbl_rst_i);
  phy1_rstn_o <= not(glbl_rst_i); 
    
  -- Route mdc 
  with phy_sel_i select phy0_mdc_o   <= gpio_mdc_i when "00", '0' when others; 
  with phy_sel_i select phy1_mdc_o   <= gpio_mdc_i when "01", '0' when others; 
  
  -- PHY0
  gpio_mdio_io <= phy0_mdio_io when (gpio_mdio_dir_i = '0' and phy_sel_i = "00") else 'Z';  
  phy0_mdio_io <= gpio_mdio_io when (gpio_mdio_dir_i = '1' and phy_sel_i = "00") else 'Z';
  
  -- PHY1
  gpio_mdio_io <= phy1_mdio_io when (gpio_mdio_dir_i = '0' and phy_sel_i = "01") else 'Z';  
  phy1_mdio_io <= gpio_mdio_io when (gpio_mdio_dir_i = '1' and phy_sel_i = "01") else 'Z';  


end mux_phy_mgmt_arc;

 

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Visitor smcb_dnae
Visitor
2,726 Views
Registered: ‎09-08-2017

Re: Two Ethernet ports sharing MDIO & MDC on Zynq

In theory, an MDIO master can control up to 32 slave PHYs using the same MDIO and MDC signals.The PHYs are configured to have different slave addresses as per the management standard.

 

Is it that the Zynq does not support this feature in its hard macros, or is there a way to configure PetaLinux to pick up on this architecture?

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Visitor smcb_dnae
Visitor
2,662 Views
Registered: ‎09-08-2017

Re: Two Ethernet ports sharing MDIO & MDC on Zynq

@dpaul24: I'm exploring EMIO options right now. Out of interest, where did your "phy_sel_i" signal come from?

 

If I configure both ENET0 and ENET1 on the PS to have EMIO for their MDIO config, I only see MDC + MDIO (3 signals, input, output & tri-state control). How do you decide which ENET* to select?

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Voyager
Voyager
2,636 Views
Registered: ‎02-01-2013

Re: Two Ethernet ports sharing MDIO & MDC on Zynq

I assume his 'phy_sel' signal is just an EMIO GPIO that is controlled by software, based on the PHY targeted by the software.  (e.g., 'phy_sel' = 0 selects PHY 0, 'phy_sel' =1 selects PHY 1.)  You would use that signal to mux the outputs (Clock, Data-Out, and Tri-state Control) and to de-mux/gate the inputs (Data In).  Usage of a 'phy_sel' of this sort compels the use of a semaphore, since MDIO transactions are multi-stage events and take so darned long to complete.

 

On several occasions, we've found that 'canned' code usually expects one MAC will control one PHY.  Sharing one MAC to control two PHY's is sometimes difficult.  As a result, we generally route the second GEM's MDIO (if a second GEM is needed) through the PL via EMIO, to allow us to connect it directly to one PHY.

 

-Joe G.

 

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Visitor smcb_dnae
Visitor
2,624 Views
Registered: ‎09-08-2017

Re: Two Ethernet ports sharing MDIO & MDC on Zynq

Looks like we've resolved the issue in the Linux kernel without the need to have an MDIO mux. The solution was to configure PetaLinux to use a Xilinx PHY instead of a Marvel PHY, even though it detects a Marvel PHY. Oh well!

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1,947 Views
Registered: ‎03-19-2018

Re: Two Ethernet ports sharing MDIO & MDC on Zynq

@smcb_dnae I'm having the same issue.  How did you go about pointing PetaLinux to use the Xilinx PHY instead of the Marvel PHY?

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