We're looking at a design that would involve at least 2 ZU9 chips sharring access to the same I2C bus and having looked at the Hardware docs it looks like the PS I2C block is multi-master capable. However has anyone tried this? More importantly do the PS i2c drivers in the Xilinx Linux layers support this operation? It's likely top to be devices like power monitors and I/O expanders that both would be accessing.
The other possible configuration is one ZU9 using a PL based i2c block while the other is a PS based one.
Does anyone have experience of either of these architectures?