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Registered: ‎05-08-2018

Unable to read/write ZynqMP PS CSU Multiboot reg in U-Boot using MMIO API

I'm using 2018.2 SDK, and want to reset CSU Multiboot register in U-Boot when doing QSPI_MODE boot.

I first tried using zynqmp_mmio_write(), but it didn't seem to reset the register in my testing. The boot.bin flashed at a higher address continued to boot on warm resets. Doing a PoR resets the register as expected however.

 

#define CSU_MULTIBOOT_BASEADDR 0xFFCA0010
zynqmp_mmio_write(CSU_MULTIBOOT_BASEADDR, 0xFF, 0x0);

Then I came across this post: https://forums.xilinx.com/t5/Embedded-Linux/Cannot-change-CSU-Multi-Boot-address-from-U-Boot/m-p/1012122#M36278

In lieu of this, I applied the following patch to my PMUFW:

diff --git a/lib/sw_apps/zynqmp_pmufw/src/pm_mmio_access.c b/lib/sw_apps/zynqmp_pmufw/src/pm_mmio_access.c
index 055e55d54..0fdc06f3a 100644
--- a/lib/sw_apps/zynqmp_pmufw/src/pm_mmio_access.c
+++ b/lib/sw_apps/zynqmp_pmufw/src/pm_mmio_access.c
@@ -295,6 +295,13 @@ static const PmAccessRegion pmAccessTable[] = {
                .endAddr = AFI_FM6_BASEADDR + 0xF0CU,
                .access = MMIO_ACCESS_RW(IPI_PMU_0_IER_APU_MASK),
        },
+
+       /* CSU Multiboot register  */
+       {
+               .startAddr = PM_MMIO_CSU_BASE + 0x10,
+               .endAddr   = PM_MMIO_CSU_BASE + 0x14,
+               .access = MMIO_ACCESS_RW(IPI_PMU_0_IER_APU_MASK),
+       },
 };
 
 /**

but I still don't get the desired behavior. zynqmp_mmio_read() always reads 0, even when booting from a higher memory address. What else do I need to write this register in U-Boot without doing a PoR?

The ZynqMP register reference manual says that this register can _only_ be reset by a PoR; that doesn't mean that I can't write 0x00 to it, right?

 

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