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Registered: ‎05-20-2019

Xilinx AXI DMA Internal error

Hello all,

I am working on xilinx axi dma driver and following PG021 file.i am only using S2MM channel and my application is to take data from AXI 4 IP put the data into PL and i am using SG Cyclic mode.

with baremetal code i am able to run this perfectly but when i try to do the same with xilinx axi driver i am getting axi dma internal error.followed the same programming sequence mentioned in the document.

all initializations are fine,but when i start transferring data i am getting dma internal error.and in SG descriptor control register field  i got the buffer length is 3 KB not zero

what i am thinking is the internal error is coming because of over run or under run,may i know what cause the dma to over run or under run and what is the solution for this.if my statement is wrong please tell me the correct way to move further


CN Ajay kumar  

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