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Visitor
Visitor
278 Views
Registered: ‎08-08-2019

Xilinx SWDT Watchdog counter value

I'm configuring Xilinx SWDT on Ultrascale+. 

I am aiming to get a delay of 1.5ms. 

But when I set the counter reset value to the lowest (1), I get a delay of 3 seconds!!

    /*
     * Set the Prescaler value
     */

    XWdtPs_SetControlValue(&Watchdog,
                XWDTPS_CLK_PRESCALE,
                XWDTPS_CCR_PSCALE_4096);

    /*
     * Set Counter Value
     */

    XWdtPs_SetControlValue(&Watchdog,
                XWDTPS_COUNTER_RESET,
				1);

    /*
     * Enable Reset Signal
     */

    XWdtPs_EnableOutput(&Watchdog, XWDTPS_RESET_SIGNAL);

    /*
     * Start the watchdog
     */

    XWdtPs_Start(&Watchdog);

I just edited the polling.c example. 

Can someone please help me out?

Thanks!

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6 Replies
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Adventurer
Adventurer
179 Views
Registered: ‎10-02-2018

i @shrinir ,

Have you solve run watchdog to reset zynqmp. Can you give solution to run that.

Thanks

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Visitor
Visitor
175 Views
Registered: ‎08-08-2019

Hi @sonminh

So I added a pmu_fw project. In the xpf config.h file, I enabled EM and system reset options. That worked for me!

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Adventurer
Adventurer
119 Views
Registered: ‎10-02-2018

Hi @shrinir ,

I see in file xpfw_config.h have define ENABLE_PM.

I add #define ENABLE_EM.

But where system reset option ?.

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114 Views
Registered: ‎08-25-2020

Perfect , it gives the accurate output . Thnks man with this i can continue to look forward for continuing my research and making a technological society.

bluestacks omegle

 

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Highlighted
Visitor
Visitor
74 Views
Registered: ‎08-08-2019

@sonminh 

try enabling ENABLE_RECOVERY_RESET_SYSTEM_VAL also

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Highlighted
Visitor
Visitor
73 Views
Registered: ‎08-08-2019

@mikestanley464 

Thank you

Also, can you please help me out on how you're changing the watchdog counter value? 

Like I want to set the counter so that I get a reset if my system is unresponsive for 1.5ms. I don't know how to convert it. Any info would be really helpful.

 

Thanks!

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