03-03-2021 12:37 PM
I am recently migrating from Zynq7000 to ZCU106 with design using DMA engine.
I am trying a simple design with DMA engine on PL in attached script. The setup is as follow:
I am following the DMA simple poll example, and it works under bare metal mode.
However, when I moved to Linux application using virtual memory address with 'mmap' instead of physical OCM memory address, it always claims 'Engine is busy'.
I notice many people use kernel module based on the driver to do the work in kernel space. Does anyone has experience of userspace DMA Linux application on ZCU106 ? Or can AXI DMA used by Linux application in userspace ?
03-10-2021 07:17 AM
03-03-2021 01:18 PM
I have a question before reply.
What is pl_clk0 of clock frequency on Zynq MPSoC IP ?
I guess it seems 20MHz and if so, it's the route cause and I suggest you to change it to ex. 100MHz and so on.
Would you make sure and consider it ?
03-04-2021 04:23 AM
I just checked the output clock. As far as I can see from PS IP setup, the frequency is set to 250MHz for the fabric. I think it should not be frequency issue as the bare metal DMA simple poll test works.
To make sure it is not cause by the frequency setting, I changed it back to 100MHz.
The bare metal DMA simple poll is still working:
But the Linux application DMA simple poll does not work as the same .
My understanding is the DMA might be busy moving data to the destination address which is not reachable for some reason.
03-07-2021 10:39 AM
I just write a simple additive function to check the registers of AXI DMA source address and sending data length.
I found event the address is written by "XAxiDma_WriteReg(InstancePtr->TxBdRing.ChanBase, XAXIDMA_SRCADDR_OFFSET, LOWER_32_BITS(BuffAddr));", when reading it there is not address value but 0x0.
I guess this the reason why DMA is always busy but not sure how this happens. To my understanding, typically, the DMA physical address can be mapped into virtual address through /dev/mem and access under userspace.
Is there any document point out in which condition the DMA can be accessed through virtual memory mapping ?
03-10-2021 07:17 AM