11-22-2016 05:35 PM
I have a Zynq-based board that is connected via QSPI to two 16MB flash chips in a parallel arrangement, and I'm having some issues getting my system to boot. I've created a boot.bin file, and when I load it over JTAG I have no issues. The problems come up when I try to write it to flash and reboot.
I have the Zynq QSPI driver enabled in U-Boot, and U-Boot correctly identifies my chip as 32MB (2x16MB). I can do reads/writes and everything seems good. I haven't actually scoped the QSPI lines, but if I write data from RAM to flash and read it back there are no issues. Also, based on the bitrates I'm seeing, I'm 99% sure that it's doing things in parallel QSPI mode.
However, when I try to write my boot.bin image from RAM to flash and restart, my system doesn't show any signs of life. When I read back the flash from QSPI, it matches up with the boot.bin file's contents.
I'm new to the whole Zynq BootROM thing, so I'm posting this in the hopes that I'm missing something obvious. Do I need to enable a certain bootgen flag? I see -dual_qspi_mode, but that supposedly creates two files. If this is the golden ticket, how would I write these two files to flash using U-Boot?
I'm just looking for some high-level direction here. I'm not very experienced with this platform so I'm sorry if this has been asked before.
11-30-2016 10:51 AM
I've only written to parallel QSPI flash using the Xilinx SDK "Program Flash" menu function. I've found that it is important to specify the Flash Type as "qspi_dual_parallel" or the boot fails.
03-14-2018 03:03 AM
have you got any lead to solve this problem? I am struggling with exactly same problem. I can dump and verify the bin file through JTAG, but FPGA cant boot itself from the Flash after Reset. I have scoped all the signals around the Flash and looks like everything is in order. I also see a clock of correcet frequency and a meaninful change in CS and data signals.
I have one more similar board which has no issue with the Flash boot operation. So, I compared the behaviour of both boards clock, CS, and data signals. I have noticed that the failing board does not complete its opetation, meaning clock, CS and DQ signals are vanishing immedietly, whereas in operating board they last for longer period of time.
03-16-2018 01:11 AM
Issue is solved for me.
The BootRom header sets false clock frequency of QSPI Flash. I have changed this default frequency (lowered the value) in .init file and problem solved.
11-08-2019 03:08 AM
I have the same issue. Which .init file do you modify? I assume my initial frequency is 200MHz, which is also too high.