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Adventurer
Adventurer
6,517 Views
Registered: ‎05-16-2012

Zynq FSBL

I just wanted to ask, how important the FSBL for the Zynq is.

Do Uboot and Linux set up all their settings anyway, or is the FSBL responsible for most setups?

 

I am asking because I have troubles merging two different workspaces (one for PS and one for PL) into one workspace for both. The problem is, that the settings are the same for the clocks (for example) but the outcome is different. And it is a lot of work to merge the settings, when you can only change them in the ps7_init files.

I tried to find settings for the PLLs but it seems to me, that those are automatically set by the XPS and can not be set by hand.

Am I overseeing some configurations?

 

As far as I see, the only valid possibility to check the correct configuration is, if i check the generated files.

The problem is, that with the merged workspace the NAND-SMC is not working any more, although the settings for nand-cycles and the SMC-Clock are the same in both projects.

 

Has anyone else encountered similar problems?

Of can I take the FSBL from one project, create a BootImage with a valid Uboot and it will work anyways?

 

Regards,

Peter

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5 Replies
Scholar norman_wong
Scholar
6,506 Views
Registered: ‎05-28-2012

Re: Zynq FSBL

Just an opinion. I would guess that the FSBL will be a required component to the Xilinx workflow. Xilinx is HW centric company. In theory, the FSBL (via ps7_init.c) and the device tree will allow the FPGA designer to configure a system without writing a line of U-Boot or Linux code.

In theory you could move FSBL functionality to u-boot.
- FSBL handshakes with the ROM bootloader
- ps7_init setup, inits clocks, MIOs, DRAM, etc.
- possibly load an FPGA bitstream
- If no FSBL, u-boot or a mini u-boot would have to first execute in OCM

If you have two workspaces, I'd suggest comparing the ps2_init.c/.h files. Small differences can cause modules to appear to in a bus hang. MIOs config are a frequent source of problems. If you use a peripheral, it's line must by muxed to pins.

 

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Adventurer
Adventurer
6,483 Views
Registered: ‎05-16-2012

Re: Zynq FSBL

Yes I agree with youthat FSBL configures MIO/Clock etc settings but I guess that not only Uboot but also Linux reconfigure baudrates, mio-settings ... as needed.

 

So the question is, how does the FSBL influence the behaviour?

Which settings are taken from the FSBL setup and wich settings are changed?

 

Because I have the impression that e.g. PLLs, Clock sources and Clock deviders are set up by FSBL but Baud-Rates are set by Linux and Uboot seperately.

 

Is there any way to set the PLLs in XPS by hand or are they always generated by the tool?

 

Thanks so far.

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Visitor mparakala
Visitor
6,402 Views
Registered: ‎12-12-2012

Re: Zynq FSBL

from a software stadnpoint, ps7_pll_init_data in ps_init.c has the required settings and this file is auto-generated from the hardward configuration defined by PlanAhead/XPS tool. You might want to play with those tools to see how ps_init.c is getting changed. That is what I would do if I need to understand FSBL.

regards,
Murthy
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Visitor sathaps2
Visitor
6,098 Views
Registered: ‎05-06-2013

Re: Zynq FSBL

I know that, FSBL is using the ps7_init files to initialize the processor, clocks and IOs. But, when FSBL starts the U-Boot, how does U-boot get to know all these settings and communicate to the correct UART, QSPI, etc..?

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Scholar norman_wong
Scholar
6,087 Views
Registered: ‎05-28-2012

Re: Zynq FSBL

As far as I know, U-Boot does not know of anything from the FSBL. U-Boot must be hand-configured to use whatever was set up by the FSBL. Similiarly for Linux. The devicetree must be hand-configured.

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