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Observer
Observer
3,717 Views
Registered: ‎10-15-2016

Zynq UltraScale+ Live Video Input/Output

Hi All, 

 

The DisplayPort Subsystem has live vide input and output ports from the PL for enabling live video overlays/previews. I have successfully got the HSYNC and VSYNC to toggle (on the live video output) but I can't get a framebuffer to output any pixel data to the live video pixel output. I am not using the DisplayPort Source Controller. Here is the path that we want to use: 

 

Inline image 1

 

The PL has a parallel TFT LCD connected. We have verified with an ILA in the PL that only HSYNC/VSYNC toggle. 

 

Any advice? Has anyone successfully gotten the Blended Video to PL to work?

6 Replies
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Moderator
Moderator
3,204 Views
Registered: ‎11-09-2015

Hi @koolscooby,

 

Sorry you had no response when you have written this post. I missed this thread.

 

Do you have any updates on this?

 

In case you still have issues:

Are you trying to use both the live input and output? Do you have any output on the DP controller?

 

Best Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Observer
Observer
3,195 Views
Registered: ‎10-15-2016

Hi @florentw,

 

Thanks for the followup. We were NOT using DisplayPort on the GTR(s). We got this to work by commenting some lines out of the DP/DRM drivers and loading them anyway. It's still not clear how much of the DP/DRM subsystem driver(s) are required to enable the functionality - but we did get something to work. It would be great if those driver(s) had a device tree flag for "live-vid-only" or something. 

 

In our use case, we were only trying to use the live video output from a linux framebuffer - but I could see where taking live video input and having alpha blending, etc - would be a useful and valid use case. 

 

Best, 

Brad

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Moderator
Moderator
3,192 Views
Registered: ‎11-09-2015

Hi @koolscooby,

 

Yes as far as I know, the current Xilinx driver does not support live output only so modifying the driver is probably the right way to go. It might be implemented later

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Visitor
Visitor
2,567 Views
Registered: ‎01-19-2015

Hello @koolscooby,

 

Could you share the changes you made in DP/DRM drivers, please? I'm struggling with the similar problem.

 

Thanks,

Radim

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Explorer
Explorer
2,524 Views
Registered: ‎12-02-2014

@koolscooby@florentw,

 

Can we please get an elaborated response on this?  This is highly demanded feature, and needs to be fleshed out.

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Participant
Participant
1,287 Views
Registered: ‎03-29-2012

Could you share your DP/DRM subsystem driver modifications?
Thank you
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