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Registered: ‎07-07-2019

Zynq UltraScale+ MPSoC PS GTR SGMII to Marvell 88E1512 PHY Ethernet


I have a custom board with Zynq UltraScale+ MPSoC (xczu7ev) and try to bring up PS GTR SGMII to Marvell 88E1512 PHY Ethernet.

Setup description:

  • Zynq GEM0 MIO is connected to RGMII PHY and working successfully
  • Zynq GEM2 & GEM3 are unused
  • Zynq PL 1G axi-ethernet is connected to SFP and working successfully
  • Zynq GEM1 I/O is configured to GT Lane 1
  • Zynq GEM1 MDIO1 is configured to EMIOScreenshot from 2021-01-23 22-22-13.png
  • Zynq GEM1 Clock source is configured to Ref Clk0 125MHzScreenshot from 2021-01-23 22-22-45.png
  • Zynq PS GTR MGTPS RX1/TX1 buses are connected to Marvell PHY 88E1512-56 SGMII interface
  • Zynq PS GTR MGTPS REFCLK0 is connected to 125MHz clock created by Si5338
  • Zynq GEM1 MDIO1 MDIO_ENET1 is connected, (MDIO through PL IOBUF), to Marvell PHY 88E1512-56 MDC/MDIO interface
  • Zynq PL constant High is connected to Marvell PHY 88E1512-56 RESETn pin
  • petalinux device-tree GEM1 config at system-user.dtsi:
&gem1 {
status = "okay";
phy-mode = "sgmii";
xlnx,ptp-enet-clock = <0x0>;


petalinux issue:

  • ethernet interface eth1 (/amba/ethernet@ff0c0000) is up but no ping
  • marvell 88E1512-56 leds are always off

I suggest that the problem is at device tree or kernel configuration.

AR# 66592 and Macb+Driver pages didn't help me.

Is there any any advice of device tree or kernel configuration for successfully usage of Zynq PS GTR SGMII to Marvell 88E1512 PHY Ethernet ???




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