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805 Views
Registered: ‎08-12-2019

Zynqmp (ZU4EV): U-Boot not starting

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Hello,

I have a custom board with a XCZU4EV FPGA. FPGA Files and BSP SW are generated using Vivado/Xilinx SDK 2018.2.

When I power-up the board I see messages from FSBL and ATF but not from U-Boot. It seems that U-Boot is not starting (see zu4ev_log.txt).

I have a scipt which is generating the fsbl.elf, bl31.elf, pmufw.elf and dts Files. I already used this script with a similar board (XCZU2EG). So I'm pretty sure that I use the correct binaries all build with 2018.2 tags/Sources.

The log output from the XCZU2EG board is exactly the same as the one from the new XCZU4EV board (except the XCZU2EG/XCZU4EV ID string).
But no output from U-Boot (I already tried with debug U-Boot with very early console output).

We run the memory test standalone app on the XCZU4EV board without errors, so ddr should work.

The XCZU4EV U-Boot starts at the old XCZU2EG board so U-Boot binary cannot be totally wrong (of course hangs later since different hw).

Any ideas how to debug this, what else I can check?

Regards,

Ralf

 

hdf2bin.sh:

-------- snip --------

git clone https://github.com/Xilinx/device-tree-xlnx.git "$tmp_dir/device-tree-xlnx"
cd "$tmp_dir/device-tree-xlnx" && git checkout "xilinx-v$XILINX_SDK_VER"

-------- snip --------

xsct -eval "setws $d;repo -set $tmp_dir/device-tree-xlnx;\
sdk createhw -name platform -hwspec $f;\
sdk createapp -name fsbl -app {Zynq MP FSBL} -hwproject platform -arch 64 -proc psu_cortexa53_0;\
sdk configapp -app fsbl build-config Release;\
sdk createapp -name pmufw -app {ZynqMP PMU Firmware} -hwproject platform -proc psu_pmu_0;\
sdk configapp -app pmufw build-config Release;\
sdk createbsp -name devicetree -hwproject platform -os device_tree -proc psu_cortexa53_0 -arch 64;\
configbsp -bsp devicetree console_device \"psu_uart_0\";\
updatemss -mss $d/devicetree/system.mss;\
regenbsp -bsp devicetree;\
sdk projects -build"

-------- snip --------

boot.bif:

//arch = zynqmp; split = false; format = BIN
the_ROM_image:
{
[fsbl_config]a53_x64
[bootloader]./fsbl.elf
[destination_device = pl]./fpga.bit
[pmufw_image]./pmufw.elf
[destination_cpu = a53-0, exception_level = el-3, trustzone]../bl31_dbg.elf
[destination_cpu = a53-0, exception_level = el-2]../../u-boot-xlnx/u-boot.elf
}

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779 Views
Registered: ‎08-12-2019

Ok, our fpga designer initialized (just initialized no data are transfered!?) a dma transfer to the ddr which seems to disturb the u-boot. Without that U-Boot is running now.

View solution in original post

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780 Views
Registered: ‎08-12-2019

Ok, our fpga designer initialized (just initialized no data are transfered!?) a dma transfer to the ddr which seems to disturb the u-boot. Without that U-Boot is running now.

View solution in original post

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