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Visitor kapi11
Visitor
161 Views
Registered: ‎07-02-2018

axidmatest timeout

Hello,

I have been trying for some time now to run axidmatest on ZynqMP ultrazed SoM from Avnet. I am on 2018.2 vivado and petalinux version. I followed some threads here to build simple design in vivado with DMA loopback. Baremetal tests ends with success so in this way I assume the design is OK.

When I try to do the same on Linux it fails every time. I have gone through many threads here with similar issues, applied recommended modifications to the project. I followed the recommendations here: https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842169/PL+Masters . I actually have only 2GB of RAM on board (so I also tested the configuration in which system memory was limited to 2GB with kernel boot parameter "mem=2G" - there were suggestions in the forum for doing so: no success).

Initially I had slave DMA on Zynq in LPD, then also on FPD.

No matter what I can not get this working, and I see something like:

modprobe axidmatest
[   56.010614] dmatest: Started 1 threads using dma0chan0 dma0chan1
[   57.012091] xilinx-vdma 80000000.dma: Cannot start channel ffffffc06ce6c218: ffffffff
[   58.019880] xilinx-vdma 80000000.dma: Cannot start channel ffffffc06ce6c018: ffffffff
[   89.062259] dma0chan0-dma0c: #0: tx test timed out
[   90.068592] xilinx-vdma 80000000.dma: Cannot start channel ffffffc06ce6c218: ffffffff
[   91.076364] xilinx-vdma 80000000.dma: Cannot start channel ffffffc06ce6c018: ffffffff
[  121.830277] dma0chan0-dma0c: #1: tx test timed out
[  122.836492] xilinx-vdma 80000000.dma: Cannot start channel ffffffc06ce6c218: ffffffff
[  123.844260] xilinx-vdma 80000000.dma: Cannot start channel ffffffc06ce6c018: ffffffff
[  154.598214] dma0chan0-dma0c: #2: tx test timed out
[  155.604575] xilinx-vdma 80000000.dma: Cannot start channel ffffffc06ce6c218: ffffffff
[  156.612348] xilinx-vdma 80000000.dma: Cannot start channel ffffffc06ce6c018: ffffffff
[  187.366262] dma0chan0-dma0c: #3: tx test timed out
[  188.372430] xilinx-vdma 80000000.dma: Cannot start channel ffffffc06ce6c218: ffffffff
[  189.380199] xilinx-vdma 80000000.dma: Cannot start channel ffffffc06ce6c018: ffffffff
[  220.134257] dma0chan0-dma0c: #4: tx test timed out
[  220.138982] dma0chan0-dma0c: terminating after 5 tests, 5 failures (status 0)
[  220.146736] zynqmp_gpd_attach_dev error -13, node 41
[  220.151625] xilinx-dpdma fd4c0000.dma: failed to add to PM domain pd-dp: -13

I am not quite sure why I get xilinx-vdma reports for this.

There must be some thing missing in my setup as I already tested the design and axidmatest on Zynq7000 and it run smoothly - no problem with doing the test. Here on ZynqMP I can not get the test running.

Snapshots of the configuration (I actually tried with Address width of 32, 40, 64 bits...):

image.pngimage.pngimage.png

 

Thanks to anybody who is able to shed some light on my issue.

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3 Replies
Observer jiv4ik
Observer
127 Views
Registered: ‎06-23-2017

Re: axidmatest timeout

Hi, @kapi11 !

Can I see your device-tree?

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Visitor kapi11
Visitor
117 Views
Registered: ‎07-02-2018

Re: axidmatest timeout

Thanks for looking into the issue.

pl.dtsi:

/*
 * CAUTION: This file is automatically generated by Xilinx.
 * Version:  
 * Today is: Tue Feb 26 09:02:36 2019
 */


/ {
	amba_pl: amba_pl@0 {
		#address-cells = <2>;
		#size-cells = <2>;
		compatible = "simple-bus";
		ranges ;
		axi_dma_0: dma@80000000 {
			#dma-cells = <1>;
			clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
			clocks = <&clk 71>, <&clk 71>, <&clk 71>, <&clk 71>;
			compatible = "xlnx,axi-dma-1.00.a";
			interrupt-names = "mm2s_introut", "s2mm_introut";
			interrupt-parent = <&gic>;
			interrupts = <0 89 4 0 90 4>;
			reg = <0x0 0x80000000 0x0 0x1000>;
			xlnx,addrwidth = <0x28>;
			xlnx,include-sg ;
			xlnx,sg-length-width = <0x18>;
			dma-channel@80000000 {
				compatible = "xlnx,axi-dma-mm2s-channel";
				dma-channels = <0x1>;
				interrupts = <0 89 4>;
				xlnx,datawidth = <0x20>;
				xlnx,device-id = <0x0>;
			};
			dma-channel@80000030 {
				compatible = "xlnx,axi-dma-s2mm-channel";
				dma-channels = <0x1>;
				interrupts = <0 90 4>;
				xlnx,datawidth = <0x20>;
				xlnx,device-id = <0x0>;
			};
		};
		psu_ctrl_ipi: PERIPHERAL@ff380000 {
			compatible = "xlnx,PERIPHERAL-1.0";
			reg = <0x0 0xff380000 0x0 0x80000>;
		};
		psu_message_buffers: PERIPHERAL@ff990000 {
			compatible = "xlnx,PERIPHERAL-1.0";
			reg = <0x0 0xff990000 0x0 0x10000>;
		};
	};
};

system-conf.dtsi:

	axidmatest_1: axidmatest@1 {
                compatible ="xlnx,axi-dma-test-1.00.a";
                dmas = <&axi_dma_0 0
                        &axi_dma_0 1>;
                dma-names = "axidma0", "axidma1";
        };

Let me know if any other info could be helpful

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Observer jiv4ik
Observer
103 Views
Registered: ‎06-23-2017

Re: axidmatest timeout

When I created the project for zynq 7000 I saw that petalinux assigns device id 0 to both dma channels.

I copy a petalinux-generated device tree from pl.dtsi  into system-user.dtsi and manually set  "xlnx,device-id = <0x1>;" in axi-dma-s2mm-channel.

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