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Visitor
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Registered: ‎05-04-2018

c2h streaming xdma linux driver - based transfers

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Hi,

 

I'm using vivado 2017.1, PCIE DMA subsystem core ver 3.1 (with the linux driver together) to design a DAQ project.

I am trying to transfer 4 * 1048576 bytes data to my linux computer.

sometimes it works well and sometimes there is randomly a very long deasserted tready signal (ms-level) which actually I used as the acquistion start signal. So there is some so-called data loss (maybe not so accurate because it's actually the device who didn't prepare well to receive data)

I modified the parameter 'CYCLIC_RX_PAGES_MAX' to 131072 in the libxdma.h, but it looks no use at all.

 

I have some questions:

1. is that this long deasserted tready signal normal? it is because of some initialization or some actions of SGDMA?

2. How can I use this xdma core for an application which has a 1GB contiguous data in total? is it a DDR3 memorz needed?

 

Thanks a lot!

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Visitor
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Registered: ‎05-04-2018

It looks problem has solved after Vivado updating to latest version - 2018.2

Now everything works well, no more strange long-low tready signal.

View solution in original post

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Visitor
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Registered: ‎05-04-2018

Additions: with the command dmesg, I can see sth:

xdma:xmda_cyclic_transfer_setup: 0-C2H0-ST: exclusive access alreday taken.

for 3 times.

My Max_Payload_Size set to 256 (was 128, max 512).

 

I am a starter with the PCIe bus. Any suggestion would be helpful!

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Scholar
Scholar
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Registered: ‎06-10-2008

Are you saying that you use tready to start an acquisition that takes several clock cycles? In other words you stop the AXI burst for every sample? I suggest to insert an AXI-Stream DATA FiFo to buffer the data (in block rams).

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Visitor
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Registered: ‎05-04-2018

@vanmierlothanks for your reply.

Yes, I use tready to start the acquisition (only at the first rising edge of the tready signal, the following edges are ignored) and I have used a AXIS FIFO to buffer the data.

What makes me confused is that the tready from C2H channel will go 'low' for a ms-level time randomly (sometimes works well and some times this happened, only for once in the whole transfer).

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Visitor
Visitor
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Registered: ‎05-04-2018

It looks problem has solved after Vivado updating to latest version - 2018.2

Now everything works well, no more strange long-low tready signal.

View solution in original post

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