05-07-2018 09:19 AM
A customer of mine has a product based on Zynq-7000. The driver for the UART (Cadence IP) found in the Xilinx-maintained Linux tree doesn't look like it supports full flow control: it always reports CTS being asserted to the higher layers which means that the device will always keep transmitting even if the other side is telling it to pause (via RTS).
The relevant piece of code looks like this:
993 * cdns_uart_get_mctrl - Get the modem control state
994 * @port: Handle to the uart port structure
996 * Return: the modem control state
998 static unsigned int cdns_uart_get_mctrl(struct uart_port *port)
1000 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
I found one discussion of this on Xilinx forums from 2013.
Would you be able to provide some answers regarding this:
Could someone please answer if there is flow control code for UARTs in Zynq-7000? And if so how to obtain it?
05-07-2018 10:23 AM
I think you've pretty much answered your own questions. It might get upgraded some day in the future, but I think its much more likely to happen if you fork the repo, upgrade the driver, and then send michalsimek a pull request. Looking at the history of the driver, it seems to get a tweak or an upgrade every few months, so it's definitely not a dead driver. It looks like nobody has had a burning need for flow control yet. This is your chance to be a hero and step up... hopefully getting paid for it too. Good luck!
11-25-2019 11:39 PM
Do you now have resolved the flow control for UARTs in Zynq-7000 ?? Now aslo we meet the issue of using the Zynq-7000 to support the auto-flow-control.
But in the latest kernel, We found it still has no patch to supporting it.If you have resolved the issue ,Could you share the patch of flow control for us?
Thanks a lot.