cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
exds75
Explorer
Explorer
2,722 Views
Registered: ‎05-01-2017

how to setup UIO SPI ?

Jump to solution

Hi Xilinx,

               petalinux 2015.4, zedboard

 

I have connected a UIO Spi Pmod device, adding a node in the system-top.dts

 

/ {
    amba_pl {
        Pmod@80000000 {
            compatible = "generic-uio";
        };
    };
};

 

UIO does not specify num-transfer-bits, max-frequency, spi-mode etc as defined in the spidev as shown in the following example:

 

https://forums.xilinx.com/t5/Embedded-Linux/How-to-use-XPS-SPI-core-driver-in-linux/td-p/73313

 

xps_spi_1: xps-spi@f6000080 {
            compatible = "xlnx,xps-spi-2.00.b", "xlnx,xps-spi-2.00.a";
            #address-cells=<1>;
            #size-cells=<0>;

            interrupt-parent = <&xps_intc_0>;
            interrupts = < 7 2 >;
            reg = < 0xf6000080 0x80 >;
            xlnx,family = "virtex5";
            xlnx,fifo-exist = <0x1>;
            xlnx,num-ss-bits = <0x2>;
            xlnx,num-transfer-bits = <0x8>;
            xlnx,sck-ratio = <0x20>;

            device@0 {
              compatible = "spidev";
              reg = <0>;  //Chip select 0
              spi-max-frequency = <3125000>;
            };

} ;

 

Therefore, I tried to directly write to SPI Control Register (SPICR) 0x60. follow https://www.xilinx.com/support/documentation/ip_documentation/axi_quad_spi/v3_2/pg153-axi-quad-spi.pdf

 

Still I find no way to define num-transfer-bits, max-frequency, and I guess my UIO-SPI is running @ default mode now, which make data transfer very slow, therefore I have to add delay function after each byte transfer to wait previous transfer settled.

 

Please advise how to properly configure a UIO-SPI . Thanks in advance.

 

Mike

 

0 Kudos
Reply
1 Solution

Accepted Solutions
exds75
Explorer
Explorer
4,501 Views
Registered: ‎05-01-2017
Problem solved. I edited QSPI in vivado block diagram to set the bit-width to 8 and lower division factor from default 16.

View solution in original post

0 Kudos
Reply
2 Replies
roccobrandi
Explorer
Explorer
2,690 Views
Registered: ‎10-14-2015

why don't you use "spidev" instead of "generic-uio"?

0 Kudos
Reply
exds75
Explorer
Explorer
4,502 Views
Registered: ‎05-01-2017
Problem solved. I edited QSPI in vivado block diagram to set the bit-width to 8 and lower division factor from default 16.

View solution in original post

0 Kudos
Reply