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Roger1
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Registered: ‎07-26-2021

kcu105 petalinux HW import no flash

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Hello All,

we are having an issue with petalinux and new HDF imports not having flash selections

we are using 2018.3 and a kcu105 eval board.  We started with the prebuilt files and then the files created by the petalinux-build process.  We can build and package a .mcs file from the petalinux BSP,  load it in the board and it runs.  So far so good. 

We then created a hw design from the template in vivado and export the design.  when this is done the flash section of the config menu shows only a manual selection.  We expected the template to create a hw profile that would continue to work in petalinux the same as the BSP does.  We have read a bunch of appnotes and UG docs to no avail.

Our HW designers are out of ideas.  This is our first petalinux project and we are now stuck.  We assume we are missing something simple and would appreciate any help or suggestions you all may have.

I have posted a similar question in the eval boards section of the forums.  We are trying to figure out if we need to modify the HW design (we believe this is the case right now) or is it a petalinux config issue we are fighting.

attached are screencaps of the page in question

FlashConfig_OrgPage.png shows the config for the BSP prior to HW import

FlashConfig_AfterImportPage.png shows the config after the import operation

Thanks,

Roger1

FlashConfig_AfterImportPage.png
FlashConfig_OrgPage.png
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Roger1
Visitor
Visitor
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Registered: ‎07-26-2021

@sandeepg @lbath 

Hi Sandeep,

The no flash issue is resolved insofar as we import into new projects every time.  should I mark this as resolved (with respect to the no flash issue) and possibly start something new related to the HDF import anomaly?

View solution in original post

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abommera
Xilinx Employee
Xilinx Employee
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Registered: ‎10-12-2018

Hi @Roger1 ,

Seems, you have not included AXI Quad SPI IP in your hardware design. Could you please cross-check once?

If you are not still seeing flash partitions, please share your .xsa and screenshot of your hardware design with us to check at my end.

Thanks & Regards
Anil B
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Roger1
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Registered: ‎07-26-2021

Hello Anil,

I have previously brought the .hdf into a SDK project instead of petalinux and there is a AXI QSPI present. 

I will forward the info you requested as soon as I can get it from my HW folks when they get in this morning

Thanks,

-Roger

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lbath
Observer
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Registered: ‎05-21-2018

Hi abommera, thanks for the quick response. Here is a shot of our evaluation design block. We are using Vivado 2018.3 and SDK, not Vivits. I believe that the .xsa file is for a Vivtis design.

Xilinx_utsci_design_Capture.PNG
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lbath
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Registered: ‎05-21-2018

abommera, I ended up having to zip the .hdf file so I could upload it to you. It is up above.

Lynn

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lbath
Observer
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788 Views
Registered: ‎05-21-2018

.hdf download.

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Roger1
Visitor
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Registered: ‎07-26-2021

Hello Anil,

is there anything more you need from us?

If so, let us know and we will get it to you.

Regards,

-Roger

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abommera
Xilinx Employee
Xilinx Employee
717 Views
Registered: ‎10-12-2018

Hi @Roger1 @lbath ,

I have just created a petalinux project with your .xdf file. I could see the all partitions instead of only manual section. Please let me know what you need to see in this.

abommera_0-1627548557627.png

 

 

Thanks & Regards
Anil B
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Roger1
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Registered: ‎07-26-2021

Hi Anil,

Can you provide the command details you used?

on our end
Host Machine
Ubutnu 18.04 LTS

Tools
vivado / SDK / petalinux 2018.3

Create Project
petalinux-create -n kcu105_ref -t project -s /usidev/Downloads/Xilinx/Installation_Packages/xilinx-kcu105-axi-full-v2018.3-final.bsp
petalinux-config & petalinux-build all ok at this point.

Import HW description
petalinux-config --get-hw-description ./export
No Flash after this.

Thanks,

Roger

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Roger1
Visitor
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Registered: ‎07-26-2021

Hi Anil,

making some progress although i have no idea why.

I started a brand new PL project, imported the HDF and I now have flash.  Lynn made some changes on the HW design so I assume that's why it is now there.

lynn made some further changes to hw, when I import HDF no changes to config info.  command I used was from the UG1157 doc which is same as the original import operation.

Created another new PL project.  Import same HDF file into the new project and latest HW changes show up in the PL config

Is there a different or additional commands I must run to update a design with a new HDF file rather than an initial import?  the 1144 document indicates the that get-hw-description is mutually exclusive with the petalilnux-config <component> variant which we understand to mean if you run the get-hw-description the PL components are auto-configured.

Regards,

Roger

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Roger1
Visitor
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Registered: ‎07-26-2021

Hello @abommera ,

more info. 

we still cannot update an existing PL project using petalinux-config --get-hw-description ....

we have to import the HDF file into a new PL project to see the changes in the HW design.

It appears the flash issue we had was due to 2 issues. 

  1. The original HDF import was missing the AXI QSPI IP Block. 
  2. subsequent imports were not being applied so we never saw the flash

current status is we see flash in the same manner as you see in your post.  We were able to do a build but the deployment to the board did not run the same as the files generated from the virgin BSP (prebuilt and new build).  we are looking into this now.

Regards,

-Roger1

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sandeepg
Moderator
Moderator
532 Views
Registered: ‎04-24-2017

Hi @Roger1 ,

Can you check if your design satisfies minimal linux boot requirements mentioned in 2018.3 UG1144, From your design I don't see dual channel timer.

sandeepg_0-1628208716539.png

 

Thanks,
Sandeep
PetaLinux Yocto | Embedded SW Support

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Roger1
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Registered: ‎07-26-2021

Hello @sandeepg 

We have checked previously and believe it does meet minimum criteria.  However, we will check again to be sure.  Would be great if that were the issue and we got past this hurdle.

Regards,

Roger1

 

 

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lbath
Observer
Observer
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Registered: ‎05-21-2018

sandeep,

I am the firmware engineer working with Roger on this design. Thanks for your willingness to help us. I have looked at the design and we are meeting all of the requirements as listed above for our design. We are trying to get the PetaLinux to run on the Xilinx KCU105 evaluation card. I have double checked everything above just to make sure that we are meeting the requirements and we are. Again thanks for your help.

Lynn

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sandeepg
Moderator
Moderator
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Registered: ‎04-24-2017

Hi @Roger1 , @lbath ,

Kyle shared your hdf when I build I don't see AXI Timer in your pl.dtsi file. If you can include in the design that would be great to investigate further.

Thanks,
Sandeep
PetaLinux Yocto | Embedded SW Support

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Roger1
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Registered: ‎07-26-2021

Hello @sandeepg 

We re-verified the timer is present.  we have a newer HDF file that we will get to you.  Let me coordinate with @lbath 

Thanks,

-Roger1

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lbath
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Registered: ‎05-21-2018

Here is the latest .hdf file that we are using.

 

Lynn

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Roger1
Visitor
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Registered: ‎07-26-2021

@sandeepg @lbath 

Hi Sandeep,

The no flash issue is resolved insofar as we import into new projects every time.  should I mark this as resolved (with respect to the no flash issue) and possibly start something new related to the HDF import anomaly?

View solution in original post

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Roger1
Visitor
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Registered: ‎07-26-2021

Hello All,

I'm closing this now

thanks for all your help. 

Regards,

-Roger

@sandeepg @lbath @abommera 

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sandeepg
Moderator
Moderator
238 Views
Registered: ‎04-24-2017

Hi @Roger1 , @lbath ,

Sorry I was busy with other task and issues. Yes please mark your post if issue is resolved.

Thanks,
Sandeep
PetaLinux Yocto | Embedded SW Support

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Roger1
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Registered: ‎07-26-2021

Hi @sandeepg

The remaining issue we are fighting is we cannot get the PL kernel to boot from SPI flash on the kcu105 eval board.  Can you recommend best place to start a new thread to resolve this?

thanks and regards,

-Roger

cc @lbath

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