cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
ajk
Contributor
Contributor
292 Views
Registered: ‎12-22-2016

mdio eth1 NOK with U-Boot v2018.3, zynq-zc706, micrel KSZ9031

Jump to solution

Hello,

we have a zc706 compatible board with two micrel PHYs.

MDIO is configured as in pic below.

Peripheral io configPeripheral io config

I have downloaded u-boot sources for v2018.3 from here: https://github.com/Xilinx/u-boot-xlnx/releases/tag/xilinx-v2018.3.

My design and app were done with Vivado/SDK 2016.2, so I downloaded Vivado/SDK 2018.3.

I was able to build u-boot..v2018.x without problems.

Modified zynq-zc706.dts.

 

 

 

/ {
	model = "zc706 compatible board";
	compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";

	aliases {
		ethernet0 = &gem0;
		ethernet1 = &gem1;
		i2c0 = &i2c0;
		serial0 = &uart1;
		spi0 = &qspi;
		mmc0 = &sdhci0;
	};
    mdio {
		compatible = "cdns,macb-mdio";
		reg = <0xe000b000 0x1000>;
		clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
        	clock-names = "pclk", "hclk", "tx_clk";
         	#address-cells = <1>;
         	#size-cells = <0>;
         	ethernet_phy0: ethernet_phy@0 {
              		compatible = "micrel,ksz9031";
              		device_type = "ethernet-phy";
                    max-speed = <1000>;
              		reg = <0>;
        	} ;
            ethernet_phy1: ethernet_phy@1 {
                	compatible = "micrel,ksz9031";
                	device_type = "ethernet-phy";
                    max-speed = <1000>;
                	reg = <1>;
              	};
	};
...
...
...
};
&gem0 {
	status = "okay";
	phy-mode = "rgmii-id";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gem0_default>;
	local-mac-address = [00 0a 35 00 1e 54];
	xlnx,ptp-enet-clock = <0x69f6bcb>;
	phy-handle = <&ethernet_phy0>;
};
&gem1 {
	status = "okay";
	phy-mode = "rgmii-id";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gem1_default>;
	local-mac-address = [00 0a 35 00 1e 55];
	phy-handle = <&ethernet_phy1>;
};

 

 

 

I have also tried the following:

 

 

 

/ {
	model = "zc706 compatible board";
	compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";

	aliases {
		ethernet0 = &gem0;
		ethernet1 = &gem1;
		i2c0 = &i2c0;
		serial0 = &uart1;
		spi0 = &qspi;
		mmc0 = &sdhci0;
	};
....
};

&gem0 {
	status = "okay";
	phy-mode = "rgmii-id";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gem0_default>;
	local-mac-address = [00 0a 35 00 1e 54];
	xlnx,ptp-enet-clock = <0x69f6bcb>;
	phy-handle = <&ethernet_phy0>;

	mdio {
		compatible = "cdns,macb-mdio";
		reg = <0xe000b000 0x1000>;
		clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
        	clock-names = "pclk", "hclk", "tx_clk";
         	#address-cells = <1>;
         	#size-cells = <0>;
         	ethernet_phy0: ethernet_phy@0 {
              		compatible = "micrel,ksz9031";
              		device_type = "ethernet-phy";
			max-speed = <1000>;
              		reg = <0>;
        	} ;
            	ethernet_phy1: ethernet_phy@1 {
                	compatible = "micrel,ksz9031";
                	device_type = "ethernet-phy";
			max-speed = <1000>;
                	reg = <1>;
              	};
	};
};

&gem1 {
	status = "okay";
	phy-mode = "rgmii-id";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gem1_default>;
	local-mac-address = [00 0a 35 00 1e 55];
	phy-handle = <&ethernet_phy1>;
};

 

 

 

And yet, eth1 does not work. I download u-boot using xmd console, and get the following output at the serial console:

 

 

 

Net:   ZYNQ GEM: e000b000, phyaddr 0, interface rgmii-id
eth0: ethernet@e000b000
ZYNQ GEM: e000c000, phyaddr 1, interface rgmii-id
PHY is not detected
GEM PHY init failed

 

 

 

 

 

Zynq> mii info
PHY 0x00: OUI = 0x0885, Model = 0x22, Rev = 0x02, 100baseT, FDX
PHY 0x01: OUI = 0x0885, Model = 0x22, Rev = 0x02, 100baseT, FDX
Zynq> mdio list
eth0:
0 - Generic PHY <--> ethernet@e000b000
eth1:
Zynq>

 

 

eth0 is ok, but eth1 is NOK.

Does u-boot-xlnx...v2018.3 support two PHYS on MDIO, or do I have to go to a higher version?

Kindly provide specific help. 

Regards,

ajk

Tags (4)
0 Kudos
1 Solution

Accepted Solutions
ajk
Contributor
Contributor
190 Views
Registered: ‎12-22-2016

I have it solved now with a quick fix. Needed to understand the MDIO.

Got the clue from the contribution of "bytownbrooks" in this link:
  https://forums.xilinx.com/t5/Processor-System-Design-and-AXI/Zynq-7000-Dual-Ethernet-Port/td-p/841439

Read Chapter 16 of Tech. Ref. Manual ug585-Zynq-7000-TRM.pdf.

Further, in Appendix B.18

phy_maint 0x00000034 32 rw 0x00000000 PHY Maintenance

is in file "drivers/net/zynq_gem.c"

/* Device registers */
struct zynq_gem_regs {
...
u32 phymntnc; /* 0x34 - Phy Maintaince reg */
...
}

Writes and reads to the above register go to the MDIO pins.

So, when MDIO is tied to ETH0 (or GEM0), both PHY0 and PHY1 need to be addressed through phy_maint of GEM0. So the base address to do an MDIO-talk to the PHYs would be that of ETH0 i.e.

e000b000

In "drivers/net/zynq_gem.c" the routine that reads and writes to phy_maint is

static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
			u32 op, u16 *data)

The base address to operate on the MDIO is got from the code:

struct zynq_gem_regs *regs = priv->iobase;

When phy_addr is 0, iobase is 0xe000b000.
When phy_addr is 1 iobase is 0xe000c000.

Now that's where config of PHY1 fails: e000c000->phymntnc has no link to MDIO!

Quick-fix:

/*struct zynq_gem_regs *regs = priv->iobase;*/
struct zynq_gem_regs *regs = e000b000;​

Final Device Tree w.r.t. gem was as below:

/ {
	model = "xyz";
	compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
	aliases {
		ethernet0 = &gem1;
		ethernet1 = &gem0;
		i2c0 = &i2c0;
		serial0 = &uart1;
		spi0 = &qspi;
		mmc0 = &sdhci0;
	};
       ...
};
&clkc {
	ps-clk-frequency = <33333333>;
};
&gem0 {
	status = "okay";
	phy-mode = "rgmii-id";
	phy-handle = <&ethernet_phy0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gem0_default>;
	local-mac-address = [00 0a 35 00 1e 54];
	
	ethernet_phy0: ethernet-phy@0 {
          compatible = "micrel,ksz9031";
          device_type = "ethernet-phy";
          max-speed = <1000>;
          reg = <0>;
  };
};
&gem1 {
	status = "okay";
	phy-mode = "rgmii-id";
	phy-handle = <&ethernet_phy1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gem1_default>;
	local-mac-address = [00 0a 35 00 1e 55];

	ethernet_phy1: ethernet-phy@1 {
          compatible = "micrel,ksz9031";
          device_type = "ethernet-phy";
          reg = <1>;
	};
};
...
};

Built the u-boot and BOOT.BIN 'ed it with FSBL and bit file.
Copied it to SD card and in uEnv.txt I could set either
ethact=eth0
or
ethact=eth1.

ipaddr, serverip, etc. were set right for each case. When booted u-boot could TFTP-get my application either through eth0 or through eth1 as per ethact setting!

If you know a better solution than a quick-fix, please do post.

ajk

View solution in original post

0 Kudos
1 Reply
ajk
Contributor
Contributor
191 Views
Registered: ‎12-22-2016

I have it solved now with a quick fix. Needed to understand the MDIO.

Got the clue from the contribution of "bytownbrooks" in this link:
  https://forums.xilinx.com/t5/Processor-System-Design-and-AXI/Zynq-7000-Dual-Ethernet-Port/td-p/841439

Read Chapter 16 of Tech. Ref. Manual ug585-Zynq-7000-TRM.pdf.

Further, in Appendix B.18

phy_maint 0x00000034 32 rw 0x00000000 PHY Maintenance

is in file "drivers/net/zynq_gem.c"

/* Device registers */
struct zynq_gem_regs {
...
u32 phymntnc; /* 0x34 - Phy Maintaince reg */
...
}

Writes and reads to the above register go to the MDIO pins.

So, when MDIO is tied to ETH0 (or GEM0), both PHY0 and PHY1 need to be addressed through phy_maint of GEM0. So the base address to do an MDIO-talk to the PHYs would be that of ETH0 i.e.

e000b000

In "drivers/net/zynq_gem.c" the routine that reads and writes to phy_maint is

static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
			u32 op, u16 *data)

The base address to operate on the MDIO is got from the code:

struct zynq_gem_regs *regs = priv->iobase;

When phy_addr is 0, iobase is 0xe000b000.
When phy_addr is 1 iobase is 0xe000c000.

Now that's where config of PHY1 fails: e000c000->phymntnc has no link to MDIO!

Quick-fix:

/*struct zynq_gem_regs *regs = priv->iobase;*/
struct zynq_gem_regs *regs = e000b000;​

Final Device Tree w.r.t. gem was as below:

/ {
	model = "xyz";
	compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
	aliases {
		ethernet0 = &gem1;
		ethernet1 = &gem0;
		i2c0 = &i2c0;
		serial0 = &uart1;
		spi0 = &qspi;
		mmc0 = &sdhci0;
	};
       ...
};
&clkc {
	ps-clk-frequency = <33333333>;
};
&gem0 {
	status = "okay";
	phy-mode = "rgmii-id";
	phy-handle = <&ethernet_phy0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gem0_default>;
	local-mac-address = [00 0a 35 00 1e 54];
	
	ethernet_phy0: ethernet-phy@0 {
          compatible = "micrel,ksz9031";
          device_type = "ethernet-phy";
          max-speed = <1000>;
          reg = <0>;
  };
};
&gem1 {
	status = "okay";
	phy-mode = "rgmii-id";
	phy-handle = <&ethernet_phy1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gem1_default>;
	local-mac-address = [00 0a 35 00 1e 55];

	ethernet_phy1: ethernet-phy@1 {
          compatible = "micrel,ksz9031";
          device_type = "ethernet-phy";
          reg = <1>;
	};
};
...
};

Built the u-boot and BOOT.BIN 'ed it with FSBL and bit file.
Copied it to SD card and in uEnv.txt I could set either
ethact=eth0
or
ethact=eth1.

ipaddr, serverip, etc. were set right for each case. When booted u-boot could TFTP-get my application either through eth0 or through eth1 as per ethact setting!

If you know a better solution than a quick-fix, please do post.

ajk

View solution in original post

0 Kudos