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simon_tam_gmail
Contributor
Contributor
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Registered: ‎08-20-2019

ports missing in device tree node

Hi,

   I got the following warnings during boot.

[ 8.311841] xilinx-tpg a02d0000.v_tpg: invalid number of ports 0
[ 8.311855] xilinx-tpg: probe of a02d0000.v_tpg failed with error -22

   And sure enough there are no port declaration for the tpg as shown in the pl.dtsi:

hdmi_output_v_tpg_0: v_tpg@a02d0000 {
clock-names = "ap_clk";
clocks = <&misc_clk_0>;
compatible = "xlnx,v-tpg-8.0", "xlnx,v-tpg-7.0";
interrupt-names = "interrupt";
interrupt-parent = <&gic>;
interrupts = <0 106 4>;
reg = <0x0 0xa02d0000 0x0 0x10000>;
xlnx,max-height = <2160>;
xlnx,max-width = <4096>;
xlnx,ppc = <2>;
xlnx,s-axi-ctrl-addr-width = <8>;
xlnx,s-axi-ctrl-data-width = <32>;
};

   I am puzzled why the DTG does not create the missing ports? Some other IPs in the same design (orginated from VCU TRD) do have their ports declared though. Is it because these IP designs are of my own? And I need to create the ports myself in system-user.dtsi?

thanks,

 

Simon

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stephenm
Xilinx Employee
Xilinx Employee
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Registered: ‎09-12-2007

Can you share your hdf/xsa

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simon_tam_gmail
Contributor
Contributor
775 Views
Registered: ‎08-20-2019

Hi Stephen,

   Attached is my project .xsa file. 

Thanks,

Simon

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stephenm
Xilinx Employee
Xilinx Employee
721 Views
Registered: ‎09-12-2007

Can you share a screenshot of your pipeline here? It might be that the DTG cant create the pipeline. If so, then you will manually need to add these in the system-user.dtsi

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simon_tam_gmail
Contributor
Contributor
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Registered: ‎08-20-2019

Hi Stephen,

   Attached is the snapshot of the block containing the IPs in question. Beside the TPG several other IPs there have similar problem. This design is based on the VCU HDMI_TX TRD. So I was expecting similar results as the TRD but didn't get it.

Thanks,

Simon

hdmi_output.PNG
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florentw
Moderator
Moderator
676 Views
Registered: ‎11-09-2015

HI @simon_tam_gmail 

Multiple video paths are not supported by the device tree generator.If you check the VCU TRD you will see that there are multiple dtsi files which are added to manually add the property nodes

Also, the fact that you have an ILA in the path could be an issue. Create the DT before adding the ILA


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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simon_tam_gmail
Contributor
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Registered: ‎08-20-2019

Hi Florentw,

   I manually edited the nodes in the system-user.dtsi and finally got it compiled through after some hiccups. For example there is a mismatch between the driver and the generated pl.dtsi in the axis switch clock name. The driver is expecting a clock name s_axi_ctl_clk. But the generated clock name in the pl.dtsi is called s_axi_ctrl_aclk. It appears to be a bug. Please file a CR for it. All of the extra IPs got probed successfully except for the TPG. I got this boot error message: 

xilinx-tpg: probe of a02d0000.v_tpg failed with error -16. 

  My guess is that the property "xlnx,vtc" not set for the TPG in the dtsi. But if that is the case it is very strange the TPG needs a VTC. I always use the TPG all by itself without any need of VTC to support it. Any thought?

thanks,

Simon

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florentw
Moderator
Moderator
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Registered: ‎11-09-2015

HI @simon_tam_gmail 

I manually edited the nodes in the system-user.dtsi and finally got it compiled through after some hiccups. For example there is a mismatch between the driver and the generated pl.dtsi in the axis switch clock name. The driver is expecting a clock name s_axi_ctl_clk. But the generated clock name in the pl.dtsi is called s_axi_ctrl_aclk. It appears to be a bug. Please file a CR for it.

[Florent] - I need more detail on this. Looking at the AXIS Switch driver, I do not see any reference to the clock. According to the device tree bindings, the only requirement is that the naeme should contain aclk. So how did you find that the driver was expecting s_axi_ctl_clk?

All of the extra IPs got probed successfully except for the TPG. I got this boot error message:

xilinx-tpg: probe of a02d0000.v_tpg failed with error -16.

My guess is that the property "xlnx,vtc" not set for the TPG in the dtsi. But if that is the case it is very strange the TPG needs a VTC. I always use the TPG all by itself without any need of VTC to support it. Any thought?

[Florent] - Review the device tree bindings of the TPG and make sure all the required properties are in your device tree. I would guess reset-gpios is missing as per the way you are connected the reset. I would expect each reset input to be connected to a single GPIO


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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