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johnblackxilinx
Contributor
Contributor
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Registered: ‎01-27-2019

problem on running .elf app before U-boot run

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Hi, I use petalinux 2019.1 and zynqmp custom board.

I need configure si5341 on fsbl with PS I2C, before kernel start.

I built an app that worked correctly on standalone mode (jtag and sd boot mode), but I need to run it before u-boot start.

First I changed .bif file and run .elf function on core 1, but app started in middle of U-boot and when kernel start up, I2C sent not found massage and kernel damaged.

Other ways .elf app didn't run at all!

Can anyone help me for this issue?

thanks

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stephenm
Xilinx Employee
Xilinx Employee
446 Views
Registered: ‎09-12-2007

The problem with the flow you are using here, is that you need to make sure that your custom app isnt in the same memory region as any other partition in the BIF.

otherwise this will just be overwritten when loaded

 

The easiest way would be to incorporate this into the FSBL. This is how the i2c clocks are handled for Xilinx dev boards. For example:

https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_apps/zynqmp_fsbl/src/xfsbl_board.c

 

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stephenm
Xilinx Employee
Xilinx Employee
528 Views
Registered: ‎09-12-2007

Can you show your BIF file? 

johnblackxilinx
Contributor
Contributor
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Registered: ‎01-27-2019

Hi, thank for reply.

the_ROM_image:
{
	[bootloader, destination_cpu=a53-0] ./images/linux/zynqmp_fsbl.elf
	[pmufw_image] ./images/linux/pmufw.elf 
	[destination_device=pl] ./images/linux/system.bit
	[destination_cpu=a53-0] ./images/linux/i2c_polled.elf
	[destination_cpu=a53-0, exception_level=el-3, trustzone] ./images/linux/bl31.elf
	[destination_cpu=a53-0, exception_level=el-2] ./images/linux/u-boot.elf
}

 

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stephenm
Xilinx Employee
Xilinx Employee
447 Views
Registered: ‎09-12-2007

The problem with the flow you are using here, is that you need to make sure that your custom app isnt in the same memory region as any other partition in the BIF.

otherwise this will just be overwritten when loaded

 

The easiest way would be to incorporate this into the FSBL. This is how the i2c clocks are handled for Xilinx dev boards. For example:

https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_apps/zynqmp_fsbl/src/xfsbl_board.c

 

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johnblackxilinx
Contributor
Contributor
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Registered: ‎01-27-2019

Hi, thank you @stephenm 

thats correct. its worked!!!

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