I am new to Linux, thus please excuse me in advance for potentially dumb questions.
We are developing a system comprising an RFSOC device. Our software will run on the APU under Linux. I planned on using the rftool application as the starting point for my custom software. I have the following questions (mostly related to the code in data_interface.c):
1. How are the following pseudo-files created? /dev/plmem<N>, /sys/class/plmem/plmem<N>/device/select_mem, /sys/class/plmem/plmem<N>/device/mem_type
I presume that the above are created by the kernel based on some DTS data, or else by some kernel driver code. Where can I find these definitions / code?
2. I presume that /dev/plmem<N> are associated with blocks in PL DDR. Am I correct?
3. DMA operations:
a) What exactly does fsync do on an fd associated with /dev/plmem<N>? The code says that it "resets DMA". Can you elaborate on that?
b) What is the exact meaning of read((info.fd_adc[adc]), info.map_adc[adc], 256 KB) (ReadDataFromMemory_bram) which supposedly "Triggers the DMA"?
General note: I went over UG1287 (several times) and haven't been able to adequately understand the code flow related to DMA. Any additional information you can provide on this will be greatly appreciated.
4. Why using 128 KB offset in the call to sendSamples in ReadDataFromMemory_ddr?
5. What exactly does channel_select_gpio do? I thought that it uses the channel code (val) conveyed to it to control the channel multiplexer, however it only uses this argument when performing an ADC-related operation when using BRAM mode and ignores it in all other cases. Please elaborate.
6. LocalMemTrigger and the rest of the code in local_mem.c - when does GUI send the LocalMemTrigger command and what exactly does it do?
7. Accessing PL-resident registers:
a) The code references DESIGN_TYPE_REG, SCRATCHPAD_REG_ADC, SCRATCHPAD_REG_DAC. Where can I find information on these?
b) General question - how is instruction ordering maintained while accessing such registers? Shouldn't one use metal_io_readXX/metal_io_writeXX for accessing memory-mapped I/O locations, as opposed to just accessing the location via the pointer? I am asking this because I will need to access PL-based registers in our custom design.