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sschekall
Participant
Participant
11,541 Views
Registered: ‎10-27-2013

standalone_v5_3 USE_AMP=1 (Linux/Baremetal) on MicroZed is Not wroking

I Ugreaded to Vivado/SDK 2015.4 and now all my AMP (Linux/Baremetal) applications fail . 

The probelem is that the standalone code on CPU1 wakes up properly but never reaches main().

 

 I have studied  http://www.wiki.xilinx.com/XAPP1078+Latest+Information 

 

I'm using : 

current linux-xlns (make  xilinx_zynq_defconfig) 

      bootparms : console-ttyPS0,11520  maxcpus=1 mem=512M root=/dev/ram rw earlyprintk 

 

standalone_cpu1.c is compiled aginst : 

standalone_v5_3 (USE_AMP=1)/cpu1 BSP 

 

when I write to 

0xfffffff0 <= 0x20000000 (from Linux) 

 

cpu1 does wakeup and begin exicution starting at 0x20000000. 

But it nevers reaches main() which is at address 0x2000544 

 

--------------- from standalone_cpu1.elf ---------------------------

 main(void) {
20000544: e92d4830 push {r4, r5, fp, lr}

--------------- from standalone_cpu1.elf ---------------------------

 

Using the debugger (breakpoint set at 0x20000000) I've confirmed that main is indeed at 0x20000544. 

 

But I cannot understand why cpu1 ends in in the weed somewhere between 0x20000000 and 0x20000544.

I need help 

 

Is there something wrong with BSP (standalone_v5_3)?

Is Linux somehow corrupting the CPU1 code in memory  (0x20000000-0x1ff00000) 

Is L2 Cache not properly disabled ?? 

 

Some one please help. 

 

 

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3 Replies
sampatd
Scholar
Scholar
11,440 Views
Registered: ‎09-05-2011

Can you please attach your zipped workspace here?

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sschekall
Participant
Participant
11,419 Views
Registered: ‎10-27-2013

workspace attached 

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johnmcd
Xilinx Employee
Xilinx Employee
11,327 Views
Registered: ‎02-01-2008

Since you are using a non-modified version of bsp, the bsp will be modifying the mmu to use ddr at 0x00000000 when you address 0x20000000 since USE_AMP=1. As a quick fix, copy standalone_v5_3 to a local sdk repository and comment out lines 220 through to 231 in src/cortexa9/gcc/boot.S. You will need to create a new bsp in order for these changes to take affect and you should be able to see the modified boot.S in the sdk bsp project.

 

I've answered a few other threads regarding xapp1078/1079. Start here: https://forums.xilinx.com/t5/Embedded-Processor-System-Design/amp-xapp1078-1079/m-p/687746

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