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Contributor
Contributor
10,525 Views
Registered: ‎03-31-2009

u-boot error

hi all,

I want to use u-boot to load kernel image to board ml507. I follow the steps listed at http://xilinx.wikidot.com/u-boot#toc11.

but i can't run command:

arch/powerpc/boot/dtc -b 0 -V 17 -R 4 -S 0x3000 -I dts -O dtb -o ml507.dtb -f arch/powerpc/boot/dts/ml507.dts

 so i do some search for dtc and then replace the command by following

 scripts/dtc/dtc -b 0 -V 17 -R 4 -S 0x3000 -I dts -O dtb -o ml507.dtb -f arch/powerpc/boot/dts/virtex440-ml507.dts

 it works and i can saw  ml507.dtb in Linux kernel root directory.

But after download uboot to board ml507 i received following message:

U-Boot 1.3.4-00326-g9abed00 (Aug 12 2009 - 10:24:27)

CPU:   Xilinx PowerPC 440 UNKNOWN (PVR=7ff21912) at 400 MHz
       32 kB I-Cache 32 kB D-Cache
### No HW ID - assuming ML507
DRAM:  256 MB
Machine Check Exception.
Caused by (from msr): regs 0fe9da08 Data Read PLB Error
Data Write PLB Error
Machine Check exception is imprecise
**bleep**: 0FFA0704 XER: 20000000 LR: 0FFA0704 REGS: 0fe9da08 TRAP: 0200 DEAR: C074280
5
MSR: 00021000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00

GPR00: 0FFA0308 0FE9DAF8 0FE9DB48 0FF9E000 0FFA1474 00000000 00000020 0FFA0704
GPR08: 00000600 00002098 0FFC9E4C 0DF9E000 00000002 FFFF8AD4 0FFCFE00 0DF9E000
GPR16: FFAEFB5F FFFEBFFB 0000A5A5 FB9EFFF7 00001000 FFFF19F0 00000000 0FFA0228
GPR24: 0FFA0A3C 0FE9DB48 0FE9DB28 0FF9E000 0FE9DB80 0FE9DB80 0FFCFE9C 00000000
Call backtrace:
28DBE90F 0FFA0678
machine check

I have two questions here:

  1.  why is wrong with plb? if i load kernel image without uboot it works normally
  2. I know we can load image via TFTP or NFS. If i want to load image via NFS how should i configure from comman line
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11 Replies
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Xilinx Employee
Xilinx Employee
10,514 Views
Registered: ‎09-10-2008

Hi,

 

It looks like you found a typo on the device tree to use on the wiki.  We'll get that corrected.

 

With regards to u-boot not running, are you sure you have the correct bit stream for the board as it changed. 

 

Here's what the wiki says regarding the bitstreams.

 

Prior to 9/8/08, we used to provide a reference system (download.bit) for the ML507. The V5 FXT Development Kit was released which provides a newer (and preferred) reference system for the ML507. The older download.bit file is now no longer available on this wiki. Instead the newer reference system can be found here:
https://secure.xilinx.com/webreg/clickthrough.do?cid=111799.
(Users are required to have or create a Xilinx user account, but the system is available for free.) The u-boot code for the ml507 supports this new reference system without code modifications.

 

Thanks,

John

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Xilinx Employee
Xilinx Employee
10,513 Views
Registered: ‎09-10-2008

With regards to your NFS question, I'm assuming you're asking how to get the kernel to use NFS root when it boots.

 

Using the following on the command line in addition to your console.

 

"root=/dev/nfs rw nfsroot=<ip>:<path to root file system>,tcp"

 

and example command line is "console=ttyS0 root=/dev/nfs rw nfsroot=192.168.0.2:/nfsroots,tcp".

 

I use tcp as I had much better luck with it a long time ago (may not be necessary?). 

 

Hope that helps,

John

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Contributor
Contributor
10,172 Views
Registered: ‎09-24-2009

I John,

 

 

I tried to u-boot testing based on  ml507_ppc440_emb_ref "download.bit"  but did not response any message to serial console.

  

 

My dowload status

 

XMD% dow u-boot
System Reset .... DONE
Downloading Program -- u-boot
        section, .text: 0x04000000-0x0401ea23
        section, .bootpg: 0x0401ea24-0x0401ecdf
        section, .resetvec: 0x0401ece0-0x0401ece3
        section, .rodata: 0x0401ece4-0x04025907
        section, .reloc: 0x04025a00-0x040266bb
        section, .data: 0x040266bc-0x04026897
        section, .data.rel.ro.local: 0x04026898-0x040268eb
        section, .data.rel: 0x040268ec-0x04026963
        section, .data.rel.local: 0x04026964-0x0402712b
        section, .u_boot_cmd: 0x0402712c-0x040277bb
        section, .bss: 0x04027800-0x0402a317
Setting PC with Program Start Address 0x0401ea24

 

 

XMD% run
Info:Processor started. Type "stop" to stop processor

 

 

 

---------------------------------------------------------------------

But Custom generated bit file that case same error from previous questions;

 

 

U-Boot 2009.08 (Sep 24 2009 - 11:55:43) CPU:   IBM PowerPC 440x5 VIRTEX5 at 400 MHz (PLB=100, OPB=50, EBC=8 MHz)       32 kB I-Cache 32 kB D-CacheXilinx ML507 BoardDRAM:  256 MBMachine Check Exception.Caused by (from msr): regs 0ff74e20 Data Read PLB ErrorMachine Check exception is imprecise**bleep**: 0FFD7704 XER: 20000000 LR: 0FFD7704 REGS: 0ff74e20 TRAP: 0200 DEAR: 12217BB2MSR: 00021000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00 GPR00: 0FFD7308 0FF74F10 0FF74F48 0FFD5000 0FFD82E4 00000000 00000020 0FFD7704GPR08: 00000600 00002098 0FFD5000 0BFD5000 FFFFFFFF FFFFD6C4 10002A00 0BFD5000GPR16: BF7BFFF7 FFF4FF7B FDE39FF7 F7FCBFE9 00000000 0FF74E10 00000000 0FFD73E8GPR24: 0FFD7BC0 0FF74F48 0FF74F28 0FFD5000 0FF75000 0FFD5000 10002AA8 0FF74F80Call backtrace:3553A533 0FFD7678machine check

 

 

Thanks,

Kiman Ha

 

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Xilinx Employee
Xilinx Employee
10,158 Views
Registered: ‎09-10-2008

Hi Kiman Ha,

 

I'll have to give it a try myself as we don't have u-boot in our automated test flow yet (wish we did).

 

I'll get back to you after I try it.

 

Thanks

 

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Xilinx Employee
Xilinx Employee
10,153 Views
Registered: ‎09-10-2008

I just rebuilt u-boot and it ran fine on the bit stream I've been using. Let me see if maybe they updated the system on xilinx.com and it won't work.

 

Thanks

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Xilinx Employee
Xilinx Employee
10,152 Views
Registered: ‎09-10-2008

I downloaded the reference design again from xilinx.com and the new u-boot image I built from Xilinx git tree runs fine.  I didn't do any more than just load it and verify it came up on a terminal (didn't load kernel....).

 

Did you clone the u-boot repository and just build it after configuring it for the ML507?

 

I tried to attach my bitstream and u-boot image for the ML507 to let you test with it. I'm not sure if the attachment will work or not.

 

It looks like an invalid memory access to me from the dump with a quick look. 

 

 

make ml507_config
make
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Xilinx Employee
Xilinx Employee
10,151 Views
Registered: ‎09-10-2008

I attached the bitstream this time as only the u-boot image got attached last time.
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Contributor
Contributor
10,132 Views
Registered: ‎09-24-2009

HI John,

 

 

First, your files worked on my ml507.

 

 

And, I made u-boot binary file same as your step.  I used version is "u-boot-2009.08" 

 

make ml507_config
make

 

Your u-boot message and my failed u-boot message is different.  

 

--- My message; 

U-Boot 2009.08 (Sep 24 2009 - 11:55:43) CPU:   IBM PowerPC 440x5 VIRTEX5 at 400 MHz (PLB=100, OPB=50, EBC=8 MHz)       32 kB I-Cache 32 kB D-CacheXilinx ML507 BoardDRAM:  256 MB

 

 

-----------------------------------------------------------------

Your download.bit and u-boot is working as below;

 

 

U-Boot 1.3.4-00326-g9abed00 (Oct  1 2009 - 13:07:55)

CPU:   Xilinx PowerPC 440 UNKNOWN (PVR=7ff21912) at 400 MHz
       32 kB I-Cache 32 kB D-Cache
### No HW ID - assuming ML507
DRAM:  256 MB
FLASH: 32 MB
*** Warning - bad CRC, using default environment

MAC address valid from I2C EEPROM
MAC address: 00:0a:35:01:e3:48
In:    serial
Out:   serial
Err:   serial
=>

 

1) Which u-boot version used for testing and download site ?

2) Can you provide to me Xilinx XPS project files for checking what different with my project.

3) Did you create your own XPS project for bit file generation ?

 

 

Thanks for help.

 

Kiman Ha,

kha@bnl.gov

 

 

 

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Xilinx Employee
Xilinx Employee
10,130 Views
Registered: ‎09-10-2008

I downloaded u-boot from git.xilinx.com/u-boot-xlnx repository.

 

The project is the one that is on xilinx.com and is referenced on the u-boot wiki page (I pasted it in below).

 

I used the bitstream from that project I downloaded from xilinx.com.

 

Here's what the wiki says about the design to download. 

 

Prior to 9/8/08, we used to provide a reference system (download.bit) for the ML507. The V5 FXT Development Kit was released which provides a newer (and preferred) reference system for the ML507. The older download.bit file is now no longer available on this wiki. Instead the newer reference system can be found here:
https://secure.xilinx.com/webreg/clickthrough.do?cid=111799.
(Users are required to have or create a Xilinx user account, but the system is available for free.) The u-boot code for the ml507 supports this new reference system without code modifications.

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Contributor
Contributor
3,461 Views
Registered: ‎09-24-2009

Thanks a lot!

 

It's Worked with Xilinx version u-boot and XPS project.

 

My problem is used different source code, it have different memory map and UARTLITE serial port.

 

   

Next i will try to flash based u-boot !

 

Best regards!

Kiman Ha,

 

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Contributor
Contributor
3,461 Views
Registered: ‎09-24-2009

Thanks a lot!

 

Now It's worked with Xilinx u-boot on th ML507.

 

Regards!!!

Kiman

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