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Anonymous
Not applicable
17,528 Views

zynq u-boot fpga command?

I see the fpga command is supported in the u-boot of 14.2 release. Is there a link / exmaple showing how to use the command to download bitstream?

 

Thanks.

 

Haibing

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Xilinx Employee
Xilinx Employee
17,525 Views
Registered: ‎09-10-2008

Hi Haibing,

 

This was commited by the community as Xilinx has not done testing on it yet.

 

Thanks.

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Adventurer
Adventurer
17,320 Views
Registered: ‎05-03-2012

Hi together,

 

I've made some tests with the "fpga" command on U-Boot 2012.04.01

It is possible to get some informations:

zynq-uboot> fpga info 0
Xilinx Device
Descriptor @ 0x3ffb8df4
Family:         Zynq PL
Interface type: Device configuration interface (Zynq)
Device Size:    4045564 bytes
Cookie:         0x0 (0)
No Device Function Table.

 

But not to load the *.bit file (Original system.bit from 14.3 TRD)

zynq-uboot> fpga load 0 0x3000000 4045679
Error: Timeout waiting for FPGA to config.
fpga - loadable FPGA image support

Due to it is not fully tested, I have some doubts to head on with testing because of bricking the dev board...

 

To load the bitstream from Linux, the FPGA bitstream must be in a binary format and byte swapped. 

Is this also the requirement for loading FPGA bitstreams from U-Boot?

I cannot find any more profound documentation regarding this issue till now.

 

Thanks and Regards,

Helmut

 

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Scholar
Scholar
17,313 Views
Registered: ‎10-26-2012

See my last mail in this topic for a simple Python script that converts a "bit" to "bin" file for direct programming:

http://forums.xilinx.com/t5/Embedded-Linux/Zynq-Loading-bitfile-into-FPGA-from-Linux-xdevcfg/td-p/237850

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Scholar
Scholar
17,312 Views
Registered: ‎10-26-2012

Seems to work fine, after loading a bin file, the "done" LED is lit. Writing the bin file takes less than a second.

zynq-uboot> fatload mmc 0 0 fpga.bin                                            
reading fpga.bin                                                                
                                                                                
4045564 bytes read                                                              
zynq-uboot> fpga load 0 0 0x3dbafc                                              
Wrong parameters for FPGA request                                               
fpga - loadable FPGA image support                                              
                                                                                
zynq-uboot> fatload mmc 0 0x1000000 fpga.bin                                    
reading fpga.bin                                                                
                                                                                
4045564 bytes read                                                              
zynq-uboot> fpga info 0                                                         
Xilinx Device                                                                   
Descriptor @ 0x3ffb89c4                                                         
Family:         Zynq PL                                                         
Interface type: Device configuration interface (Zynq)                           
Device Size:    4045564 bytes                                                   
Cookie:         0x0 (0)                                                         
No Device Function Table.                                                       
zynq-uboot> fpga load 0 0x1000000 0x3dbafc                                      
zynq-uboot> 
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Adventurer
Adventurer
17,289 Views
Registered: ‎05-03-2012

Works well!

 

Thanks a lot!

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Observer
Observer
15,823 Views
Registered: ‎10-17-2009

Hello,

 

Has anyone been able to configure PL with an encrypted bitstream from u-boot? I've booted PS in secure mode by creating an encrypted BOOT.BIN then tried to configure PL with the encrypted bitstream but u-boot fpga command just prints the help screen and the FPGA doesn't get configured. If I then run u-boot fpga command again with an unencrypted bitstream, it gets configured OK. Encrypted bitstreams do work OK from FSBL but ultimately I want to be able to configure the FPGA with encrypted bitstreams from Linux.

 

Regards,

Niro.

 

 

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Adventurer
Adventurer
15,805 Views
Registered: ‎05-03-2012

Hi Niro,

 

unfortunately not.

But maybe the newest version of the software guide can help.

http://www.xilinx.com/support/documentation/user_guides/ug821-zynq-7000-swdev.pdf

 

There are some topic changes regarding encryption mentioned in the revision history

 

Best regards,

Helmut

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Observer
Observer
15,769 Views
Registered: ‎10-17-2009

Hi Helmut,

 

Thanks for your response - Latest u-boot from Xilinx's git repository can configure PL with encrypted bitstreams. However, it only works once. Subsequent attempts to configure PL with the same encrypted bitstream fails but this was good enough for me to know that it is possible to configure PL with encrypted bitstreams outside of FSBL.

 

On a side note, Linux's /dev/xdevcfg driver also didn't work with encrypted bitstreams and it was causing Linux to lock-up. After some debug I found that the lock-up was by Linux being flooded with PCAP IRQs after trying to configure PL. After adding 250us of delay between assertion and deassertion of PCFG_PROG_B bit in PCAP CTRL register (used to reset PL) fixed this issue and now I am able to configure PL with encrypted bitstreams from Linux as many times as I want.

 

Regards,

Niro.

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Adventurer
Adventurer
15,753 Views
Registered: ‎05-03-2012

Niro,

 

sounds very good that you had success.

 

Best regards,

Helmut

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