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Observer j.kiran889
Observer
495 Views
Registered: ‎08-02-2018

10G ethernet subsystem PHY type

Hello,

 

I am using XAPP1305 as reference. The device tree entry for 10G was generated using hsi and is given below - 

/ {
	amba_pl: amba_pl@0 {
		#address-cells = <2>;
		#size-cells = <2>;
		compatible = "simple-bus";
		ranges ;
		axi_dma_0: dma@80000000 {
			#dma-cells = <1>;
			clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk";
			clocks = <&clk 71>, <&clk 71>;
			compatible = "xlnx,eth-dma";
			interrupt-names = "mm2s_introut", "s2mm_introut";
			interrupt-parent = <&gic>;
			interrupts = <0 89 4 0 90 4>;
			reg = <0x0 0x80000000 0x0 0x10000>;
			xlnx,include-dre ;
		};
		xxv_ethernet_0: ethernet@80010000 {
			axistream-connected = <&axi_dma_0>;
			axistream-control-connected = <&axi_dma_0>;
			clock-frequency = <100000000>;
			compatible = "xlnx,xxv-ethernet-1.0";
			device_type = "network";
			phy-mode = "base-r";
			reg = <0x0 0x80010000 0x0 0x10000>;
			xlnx = <0x0>;
			xlnx,add-gt-cntrl-sts-ports = <0x0>;
			xlnx,anlt-clk-in-mhz = <0x64>;
			xlnx,axis-tdata-width = <0x40>;
			xlnx,axis-tkeep-width = <0x7>;
			xlnx,base-r-kr = "BASE-R";
			xlnx,clocking = "Asynchronous";
			xlnx,core = "Ethernet MAC+PCS/PMA 64-bit";
			xlnx,data-path-interface = "AXI Stream";
			xlnx,enable-datapath-parity = <0x0>;
			xlnx,enable-pipeline-reg = <0x0>;
			xlnx,enable-preemption = <0x0>;
			xlnx,enable-preemption-fifo = <0x0>;
			xlnx,enable-rx-flow-control-logic = <0x0>;
			xlnx,enable-time-stamping = <0x0>;
			xlnx,enable-tx-flow-control-logic = <0x0>;
			xlnx,enable-vlane-adjust-mode = <0x0>;
			xlnx,family-chk = "zynquplus";
			xlnx,fast-sim-mode = <0x0>;
			xlnx,gt-diffctrl-width = <0x4>;
			xlnx,gt-drp-clk = "100.00";
			xlnx,gt-group-select = "Quad X0Y0";
			xlnx,gt-location = <0x1>;
			xlnx,gt-ref-clk-freq = "156.25";
			xlnx,gt-type = "GTH";
			xlnx,include-auto-neg-lt-logic = "None";
			xlnx,include-axi4-interface = <0x1>;
			xlnx,include-dre ;
			xlnx,include-fec-logic = <0x0>;
			xlnx,include-rsfec-logic = <0x0>;
			xlnx,include-shared-logic = <0x1>;
			xlnx,include-user-fifo = <0x1>;
			xlnx,lane1-gt-loc = "X0Y4";
			xlnx,lane2-gt-loc = "NA";
			xlnx,lane3-gt-loc = "NA";
			xlnx,lane4-gt-loc = "NA";
			xlnx,line-rate = <0xa>;
			xlnx,mii-ctrl-width = <0x4>;
			xlnx,mii-data-width = <0x20>;
			xlnx,num-of-cores = <0x1>;
			xlnx,ptp-clocking-mode = <0x0>;
			xlnx,ptp-operation-mode = <0x2>;
			xlnx,runtime-switch = <0x0>;
			xlnx,rxmem = <0x40000>;
			xlnx,switch-1-10-25g = <0x0>;
			xlnx,tx-latency-adjust = <0x0>;
			xlnx,tx-total-bytes-width = <0x4>;
			xlnx,xgmii-interface = <0x1>;
			local-mac-address = [00 0a 35 00 22 01];
			xxv_ethernet_0_mdio: mdio {
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};
	};
};

On booting linux, there is no eth entry. The dmesg output is as follows - 

root@analog:~# dmesg | grep eth
[    0.000000] psci: probing for conduit method from DT.
[    2.153212] iommu: Adding device ff0e0000.ethernet to group 1
[    2.159117] macb ff0e0000.ethernet: Not enabling partial store and forward
[    2.171521] macb ff0e0000.ethernet eth0: Cadence GEM rev 0x50070106 at 0xff0e0000 irq 23 (4a:1d:04:8f:4a:ed)
[    2.181143] TI DP83867 ff0e0000.ethernet-ffffffff:0c: attached PHY driver [TI DP83867] (mii_bus:phy_addr=ff0e0000.ethernet-ffffffff:0c, irq=POLL)
[    2.194661] xilinx_axienet 80010000.ethernet: couldn't find phy i/f
[    2.212337] usbcore: registered new interface driver cdc_ether

It looks like the axienet driver is looking for a phy entry in the device tree but since it is not present, it is failing. The 10G IP does not have any option for setting the PHY address. Should there be a phy entry in the device tree?

 

What is the solution to this problem?

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5 Replies
Visitor haoze
Visitor
147 Views
Registered: ‎10-11-2017

回复: 10G ethernet subsystem PHY type

Have you solved this problem?I have the same problem with vivado 2018.2 too.I really appreciate you telling me something.

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Moderator
Moderator
140 Views
Registered: ‎07-31-2012

回复: 10G ethernet subsystem PHY type

Hi @haoze ,

 

You have do modify as per app note and https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841830/PS+and+PL+based+Ethernet+in+Zynq+MPSoC#PSandPLbasedEthernetinZynqMPSoC-2.6.1.4Modificationstosystem-user.dtsi to provide local mac address in system-user.dtsi for 10G PL IP.

/include/ "system-conf.dtsi"
/ {
};
&xxv_ethernet_0 {
local-mac-address = [00 0a 35 00 00 00];
};

 

Regards

Praveen

 


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Moderator
Moderator
127 Views
Registered: ‎09-12-2007

回复: 10G ethernet subsystem PHY type

Also you need to enable the xilinx phy driver in linux kernel config.

 

This is all covered in the xapp1305

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Visitor haoze
Visitor
92 Views
Registered: ‎10-11-2017

回复: 10G ethernet subsystem PHY type

Thanks so much for your response.I do as the XAPP1305 said but problems still happen.I suspect I'm loading the wrong driver.Would you mind sharing your device tree file or something .dtsi file with me.Looking forward to your reply.
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Moderator
Moderator
71 Views
Registered: ‎07-31-2012

回复: 10G ethernet subsystem PHY type

Hi @haoze ,

Please download the XAPP1305 reference design file and use pl_eth_10g bsp to generate petalinux workspace,

Regards

Praveen


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