UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
1,115 Views
Registered: ‎11-19-2013

A question about accessing ZYNQ MMR

Hello everyone,

     I have a demo board of XC7Z020, and i have a little question about the access mode of memery mapped registers. I don't know how to access the registers correctly. For example, bits[31:16] of  the GPIO's MASK_DATA_0_LSW register (0xE000A000) should be 0 when be read, and bits[15:0] of this register should be writable, but when i read the register's address from SDK's memory view, the high half data didn't reflect 0, and the low half data can not be write, just like the attachments.

     I don't know what initialization steps i missed if i want to get a direct access to all the MMRs.

view.bmp
0 Kudos