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Observer sbuschjaeger
Observer
8,178 Views
Registered: ‎07-29-2015

AXI DMA error interrupt is asserted

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Hey,

 

I would like to use the lwIP Example (XAPP1026) without the DDR RAM. Somewhere here in the forum a few people already mentioned that this is possible, but they did not go into details about their system setup.

So I built a system on my own and synthesis/implementation worked. Also I was abel to generate the board support packages for the

tcp/ip echo server example. However, now I run into the following problem on the follwing line:

 

int main()
{
	struct ip_addr ipaddr, netmask, gw;

	/* the mac address of the board. this should be unique per board */
	unsigned char mac_ethernet_address[] =
	{ 0xde,0xad,0xbe,0xef,0x5b,0x00 };

	echo_netif = &server_netif;
#ifdef __arm__
#if XPAR_GIGE_PCS_PMA_SGMII_CORE_PRESENT == 1 || XPAR_GIGE_PCS_PMA_1000BASEX_CORE_PRESENT == 1
	ProgramSi5324();
	ProgramSfpPhy();
#endif
#endif

	init_platform();

#if LWIP_DHCP==1
    ipaddr.addr = 0;
	gw.addr = 0;
	netmask.addr = 0;
#else
	/* initliaze IP addresses to be used */
	IP4_ADDR(&ipaddr,  192, 168,  128, 50);
	IP4_ADDR(&netmask, 255, 255, 255,  0);
	IP4_ADDR(&gw,      192, 168,  128,  1);
#endif	
	print_app_header();

	lwip_init();

  	/* Add network interface to the netif_list, and set it as default */
	if (!xemac_add(echo_netif, &ipaddr, &netmask,
						&gw, mac_ethernet_address,
						PLATFORM_EMAC_BASEADDR)) {
		xil_printf("Error adding N/W interface\n\r");
		return -1;
	}
	netif_set_default(echo_netif);

	/* now enable interrupts */
	platform_enable_interrupts();

	/* specify that the network if is up */
        //ERROR NOW HERE
	netif_set_up(echo_netif);

The serial connection gives me:

axidma_recv_handler: Error: axidma error interrupt is asserted

Multiple times.

 

My fist bet would be, that I run out of memory. However, the local memory is not connected using DMA, but only the shared memory. Any ideas?

Or maybe someone could point me to a (working) setup without DDR?

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Observer sbuschjaeger
Observer
14,487 Views
Registered: ‎07-29-2015

Re: AXI DMA error interrupt is asserted

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As expected, I misconfigured something with the DMA controller or maybe DMA needs DDR RAM? I dont know. I solved the problem now by using a simple FIFO which uses less LUT anyway

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4 Replies
Moderator
Moderator
8,022 Views
Registered: ‎07-31-2012

Re: AXI DMA error interrupt is asserted

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Hi,

 

Please refer to https://forums.xilinx.com/t5/Embedded-Processor-System-Design/XAPP1026-without-DDR/td-p/473902 for lwip without DDR.

 

Regards

Praveen

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Observer sbuschjaeger
Observer
7,945 Views
Registered: ‎07-29-2015

Re: AXI DMA error interrupt is asserted

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Hey,

 

I did that, but I still got the same error. I started with the XAPP1026 example and configured a lwIP stack so that the whole echo server test uses around 500KB (see first screenshot). I configured the microblaze processor to have 512K address range for data and instructions so that should fit.  I am able to execute this program on my system. I also added. 256K shared memory (see second screenshot).

 

However I still get 

axidma_recv_handler: Error: axidma error interrupt is asserted

 

To my surprise, the shared memory is not listed in the hardware specification file (first screenshot). Maybe there is something wrong? Also, is it normal to have the same base address for instruction and data in local memory? This feels a little weird to me since this way the compiler has to make sure that .data and .text are in two different areas of memory.

sdk.png
address_map.png
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Observer sbuschjaeger
Observer
14,488 Views
Registered: ‎07-29-2015

Re: AXI DMA error interrupt is asserted

Jump to solution

As expected, I misconfigured something with the DMA controller or maybe DMA needs DDR RAM? I dont know. I solved the problem now by using a simple FIFO which uses less LUT anyway

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Contributor
Contributor
6,133 Views
Registered: ‎11-09-2012

Re: AXI DMA error interrupt is asserted

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I also observed axidma_recv_handler: Error: axidma error interrupt is asserted when trying to run the lwip echo server without external memory. Turns out, the DMA engine did not have access to the memory region where the lwip buffer was located. As far as I can tell, the lwip heap is static and, consequently, is located in the BSS memory segment.

 

I had placed the Code, Data (includes BSS), and Heap & Stack segments in the MicroBlase ILMB/DLMB block ram. However, this memory was accessable only to the MicroBlase and not to the AXI Ethernet DMA engine. Since lwip needs the ethernet data DMA'd into the BSS segment, which was impossible, lwip never got the data.

 

Assigning the entire Data section or just the .bss segment to an AXI block ram that was accessible to both the MicroBlaze and the AXI Ethernet DMA engine solved the problem. This can be done using the Generate Linker Script tool for the lwip application in SDK.