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Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

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Adventurer
Posts: 92
Registered: ‎06-04-2012
Accepted Solution

Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

Hi,all.
 
Everyone knows that there is an OCM (Memory on Chip) in ZYNQ.
 
Moreover, there is L2 Cache in it, too.
 
The OCM is just 256KB, and sometimes maybe the user's code is too large to be accommodated in the OCM.
 
So I just want to know if the L2 Cache can be used as RAM ?
 
If yes, how to use it?
 
Thanks.

Accepted Solutions
Explorer
Posts: 111
Registered: ‎05-12-2011

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

The L2 cache is designed to overlay a real memory store of some sort, and I really doubt there's any way to get it to simply behave like another block of RAM.  In theory you may be able to load values into the L2 cache and then lock them so an address range that's not really even there will look like a RAM, but you're not going to find anyone who can tell you how to do that or if it will really work or not.  That would be entirely up to you to figure out.  Let us know if you get it to work!

 

Cheers,

-Doug

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Xilinx Employee
Posts: 567
Registered: ‎07-30-2007

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

The L2 cache has the ability to lock lines into cache. I'm not sure what you're looking for, but more information is in the APU chapter of the Zynq TRM.

Adventurer
Posts: 92
Registered: ‎06-04-2012

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

Thanks, dylan.

Yeah, I know the APU chapter of the ZYNQ TRM.

I mean that the user's executable code is stroed in the OCM when the chip is powered on.

However, the OCM is just 256KB. If the user's executable code is larger than 256KB, the OCM can't contain it completely.

So I think the issue will be sovled if the L2 cache can be confiurated as RAM, just like the OCM performs.

Do you think so?

But I am not sure if the L2 cache surpport this, because I didn't find the relative information in the APU chapter of the ZYNQ TRM.

Explorer
Posts: 111
Registered: ‎05-12-2011

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

The L2 cache is designed to overlay a real memory store of some sort, and I really doubt there's any way to get it to simply behave like another block of RAM.  In theory you may be able to load values into the L2 cache and then lock them so an address range that's not really even there will look like a RAM, but you're not going to find anyone who can tell you how to do that or if it will really work or not.  That would be entirely up to you to figure out.  Let us know if you get it to work!

 

Cheers,

-Doug

Adventurer
Posts: 92
Registered: ‎06-04-2012

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

Thanks,Doug.

Yes, you are right. It is confirmed that the L2 cache doesn't surpported to be configurated as a RAM.

If the executable code is larger than 256KB, an external memory is needed, such as DDRx, SRAM.

Xilinx Employee
Posts: 567
Registered: ‎07-30-2007

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

Another posibility is to run code directly from a QSPI device, as execute in place mode. However, this is another advanced area that you would need to overcome some complexity (mostly with the linker) mostly by yourself.

Explorer
Posts: 111
Registered: ‎05-12-2011

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

Or if you need RAM have some unused block RAM in the PL, you could add an AXI4 BRAM interface and the RAM would appear in one of the master AXI address spaces...  Not having any DDR3 would certainly simplify the board layout and reduce power consumption.

Adventurer
Posts: 92
Registered: ‎06-04-2012

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

Thank you,dylan and dchavir. 

Both methods are effective.

The advice given by dchavir sounds good. But I tried to add an AXI4 BRAM for DMA before, I failed. 

 

Maybe I solve the issue some day,  I will chose AXI4 BRAM.

I think adding a DDR3 is suitable for my project right now.

Thanks again.

 

Explorer
Posts: 218
Registered: ‎11-22-2015

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

I wrote a bootrom a while back that would load the second stage bootloader into the L2 and then execute from the L2. Obviously this was before DDR was initialized and translation tables were set up. So it is possible but if you wanted to do this after the system boots it would be very painful to figure out. Just adding BRAM would be much easier.

jeff