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Newbie micro.diee
Newbie
8,647 Views
Registered: ‎05-08-2009

Connecting a custom peripheral to the LMB microblaze interface

Hi,

I'm trying to connect a custom peripheral (correctly imported) to the LMB port (data side) of the microblaze 7.10d, within EDK 10.1.3. To allow platgen to create the system, I had to change a flag value inside the microblaze tcl script. My problem, so far, is that I'm not able to stall the microblaze neither using the LMB_ready nor the LMB_Wait signal.

I also tied LMB-ready to gnd and LMB_Wait to vdd to see a microblaze stall, but it did not work. Please consider that the same system worked with previous versions of microblaze (namely 4.xx) but I had to change because these versions are not provided for virtex5 devices. We were not able to find any documentation related to the semantics of the Dwait interface port of the MicroBlaze. Does anybody have any advice on this? Please consider that i'm not using PLB since my precise need is to avoid insertion of arbitration/transfer latency between the microblaze and the peripheral, so LMB responding in 1 cycle is the ideal option.

Thanks in advance for your help

 

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10 Replies
8,052 Views
Registered: ‎02-25-2009

Re: Connecting a custom peripheral to the LMB microblaze interface

when i try to Connecting a custom peripheral to the LMB microblaze interface, i got error :

 

but i can not find where it is for IGNORE_CUSTOM_LMB_IP_ERROR

 

Running DRC Tcl procedures for OPTION SYSLEVEL_DRC_PROC...
ERROR:EDK:3193 - issued from TCL procedure
   "::hw_microblaze_v7_20_d::check_syslevel_settings" line 43
    microblaze_0 (microblaze) - Detected non-standard LMB slave:
   lmb_periph_if_cntlr. XILINX does not support using the LMB interface with any
   IP except LMB_BRAM_IF_CNTLR. Other IP may severely limit the processor
   maximum frequency. To use a non-standard LMB slave, this error check can be
   disabled by setting IGNORE_CUSTOM_LMB_IP_ERROR to 1 in the MicroBlaze TCL
   file.
ERROR:EDK:440 - platgen failed with errors!

 

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8,049 Views
Registered: ‎02-25-2009

Re: Connecting a custom peripheral to the LMB microblaze interface

I found it in file : microblaze_v2_1_0.tcl 488 line

 

#
#
proc check_syslevel_settings { mhsinst } {

    # To allow custom LMB IP please change this variable to 1
    set IGNORE_CUSTOM_LMB_IP_ERROR 1

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Xilinx Employee
Xilinx Employee
8,039 Views
Registered: ‎08-06-2007

Re: Connecting a custom peripheral to the LMB microblaze interface

Hi,

 

The usage of waitstates on LMB is a non-supported feature and thus is not documented.

It doesn't get tested and verified at all. 

In the MicroBlaze reference guide it isn't mentioning at all.

 

There are number of configuration where it will not work, e.g. if caches are enabled, it will not work.

 

Göran

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Highlighted
6,779 Views
Registered: ‎02-25-2009

Re: Connecting a custom peripheral to the LMB microblaze interface

MB 8.1

 

LMB has wait signal

 

 

Wait
The Wait signal is an input to the core and indicates that the current transfer has been accepted, but not yet completed. It is sampled on the rising edge of the clock.
Ready
The Ready signal is an input to the core and indicates completion of the current transfer and that the next transfer can begin in the following clock cycle. It is sampled on the rising edge of the clock. For reads, this signal indicates the Data_Read[0:31] bus is valid, and for writes it indicates that the Data_Write[0:31] bus has been written to local memory.

 

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Xilinx Employee
Xilinx Employee
6,762 Views
Registered: ‎08-06-2007

Re: Connecting a custom peripheral to the LMB microblaze interface

Hi,

 

We added Wait signal handling in v8.10.a since we needed it for ECC.

There are also two more new signals UE and CE which is only used for ECC but for byte/half-word write handling in ECC, we also needed true wait-state handling on the LMB.

 

So from v8.10.a, waitstate is supported on LMB.

 

Göran

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Adventurer
Adventurer
6,389 Views
Registered: ‎05-12-2012

Re: Connecting a custom peripheral to the LMB microblaze interface

Do you have plans to create a core, which is a kind of LMB I / O Module, but without timers, uarts, gpios and others, or core, similar to LMB BRAM Controller but with the option of wait cycle? This is will be very useful core.

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Xilinx Employee
Xilinx Employee
6,384 Views
Registered: ‎08-06-2007

Re: Connecting a custom peripheral to the LMB microblaze interface

Hi,

 

There are no plans for that but since the LMB BRAM Controller is delivered in source code, you can easily modify it yourself.

 

Göran

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Adventurer
Adventurer
6,380 Views
Registered: ‎05-12-2012

Re: Connecting a custom peripheral to the LMB microblaze interface

How about import peripheral for LMB bus? I dont find this future...

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Xilinx Employee
Xilinx Employee
6,376 Views
Registered: ‎08-06-2007

Re: Connecting a custom peripheral to the LMB microblaze interface

Hi,

 

It doesn't exists since AXI is the place for creating your own peripherals.

LMB output is unclocked used by MicroBlaze in order to minimize the latency but this will have an impact on the frequency.

So placing too much on LMB will lower the maximum frequency for MicroBlaze.

 

Expert users might use LMB for the peripherals but it's not that something Xilinx encourage everyone to do.

Furthermore, LMB is very simple (compared to AXI) that it shouldn't be hard to modify IO_Module or LMB_BRAM_Controller for your needs.

 

Göran

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Adventurer
Adventurer
1,441 Views
Registered: ‎05-12-2012

Re: Connecting a custom peripheral to the LMB microblaze interface

Thank you for quick response. Really I realise that import lmb peripheral isn't hard. All what we need for full integration with EDK is change MDP of custom core.
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