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3,179 Views
Registered: ‎01-26-2016

Continuous interrupt from custom IP design to PS

Hello guys,

I am designing an application where PS would read the data from custom IP, only when custom IP block generates an interrupt.

I have chosen one output wire 'Interrupt_out' in the custom design which acts as an Interrupt and is connected to the IRQ_F2P on the PS side of zynq.

In my custom design, I have just made Interrupt_out high for just one clock cycle and then made it low. 

In the interrupt handler of this interrupt on the PS, I am incrementing a counter every time an interrupt hits. As I am generating interrupt only once from my custom design, ideally interrupt handler should be hit only once. But it is executing the Interrupt handler continuously.

So, to ensure everything I made following changes:

1. I tested the logic in custom design using testbench and simulation to make sure that the interrupt is generated only once, which works fine.

 

2. Upon reading on the forum posts, I changed the priority of the interrupt and made the trigger type to level high, or rising edge using

XScuGic_SetPriorityTriggerType(&InterruptController, FPGA_INT_ID,0xA0, 0x3);

 

But still I am not able to solve this problem, as it is continuously executing the Interrupt handler code.

I also attach the block diagram of my design.

Can anyone suggest where I am going wrong or what am I missing?

Thanks a lot

 

 

 

 

 

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3 Replies
Teacher muzaffer
Teacher
3,169 Views
Registered: ‎03-31-2012

Re: Continuous interrupt from custom IP design to PS

@darpandamani93 It seems that you are not acknowledging your interrupt on the PS side. Can you show your interrupt handler ?

most probably you need something like the following:

    //Clear interrupt in ps
    IntIDFull = XScuGic_CPUReadReg(&InterruptController, XSCUGIC_INT_ACK_OFFSET);
    XScuGic_CPUWriteReg(&InterruptController, XSCUGIC_EOI_OFFSET, IntIDFull);

Checkout this thread: https://forums.xilinx.com/t5/Embedded-Processor-System-Design/Zynq-7000-How-to-clear-Interrupt-from-PL-to-PS/td-p/685039

- Please mark the Answer as "Accept as solution" if information provided is helpful.
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3,161 Views
Registered: ‎01-26-2016

Re: Continuous interrupt from custom IP design to PS

@muzaffer Thanks for replying me. But I had already referred that post and had made change in my code.

Here is how my code looks:

 

Xil_ExceptionInit();


GicConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);
if (NULL == GicConfig)

  {
  return XST_FAILURE;
  }

 

Status = XScuGic_CfgInitialize(&InterruptController, GicConfig,GicConfig->CpuBaseAddress);
if (Status != XST_SUCCESS)

   {
   return XST_FAILURE;
   }

 

Status = XScuGic_SelfTest(&InterruptController);
if (Status != XST_SUCCESS)

  {
  return XST_FAILURE;
  }

Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IRQ_INT,(Xil_ExceptionHandler) XScuGic_InterruptHandler,
(void *) &InterruptController);
Xil_ExceptionEnable();

 

Status = XScuGic_Connect(&InterruptController, FPGA_INT_ID ,(Xil_ExceptionHandler)DeviceDriverHandler,
(void *)&InterruptController);

if (Status != XST_SUCCESS)

  {
  return XST_FAILURE;
  }

XScuGic_SetPriorityTriggerType(&InterruptController, FPGA_INT_ID,
0xA0, 0x3);
XScuGic_GetPriorityTriggerType(&InterruptController, FPGA_INT_ID,
Priority, Trigger);
xil_printf(" Priority : 0x%x", *Priority);
xil_printf(" Trigger : 0x%x", *Trigger);
XScuGic_Enable(&InterruptController,FPGA_INT_ID );

 

 

The interrupt handler code looks like this: 

void DeviceDriverHandler(void *CallbackRef)
{
//XScuGic_Disable(&InterruptController,FPGA_INT_ID );
count++;

xil_printf("Value : %d", count);

IntIDFull = XScuGic_CPUReadReg(&InterruptController, XSCUGIC_INT_ACK_OFFSET);
XScuGic_CPUWriteReg(&InterruptController, XSCUGIC_EOI_OFFSET, IntIDFull);
//XScuGic_Enable(&InterruptController,FPGA_INT_ID );
}

 

Also, I had tried with disabling the interrupt at the start of handler and enabling the interrupts when the handler exits, but that doesnt work too.

Thanks again for replying and kindly let me know where am I making mistake.

 

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Highlighted
1,151 Views
Registered: ‎03-20-2017

Re: Continuous interrupt from custom IP design to PS

set interrupt status register in your IP, and write the status register some bit to disable the interrupt signal in interrupt_handler function

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