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Participant perencia-wc
Participant
273 Views
Registered: ‎10-03-2017

Custom MPSoC INIT_B holds low

We are trying to boot a custom MPSoC inspired in the ZCU102 board. When we boot, PS_INIT_B stays low, ERROR_STATUS, ERROR_OUT and DONE are LOW.

This is the JTAG chain we see.

xsct% targets
1 PS TAP
2 PMU
3 PL
4 dummy_dap

The JTAG registers shown on Vivado are zero.

I have checked that POR_B and SRST_B are held LOW from the power-up until 1 second (just for testing) after the VCCs are correct (the values have also been checked).

Curiosly, after a couple of minutes or so, ERROR_OUT turns asserted and the ARM DAP appears on the JTAG chain (though not the MicroBlaze PMU). 

xsct% targets
1 PS TAP
2 PMU
3 PL
4 PSU
5 RPU (Reset)
6 Cortex-R5 #0 (RPU Reset)
7 Cortex-R5 #1 (RPU Reset)
8 APU (L2 Cache Reset)
9 Cortex-A53 #0 (APU Reset)
10 Cortex-A53 #1 (APU Reset)
11 Cortex-A53 #2 (APU Reset)
12 Cortex-A53 #3 (APU Reset)

We can also see then an CSU_BR_ERROR on the vivado JTAG registers.

We have check that nothing holds INIT_B nor PROGRAM_B low (our pcb design is based on the ZCU102 RevD1).

What could make INIT_B to stay LOW, preventing the arm dap to appear?

Also, what could be the cause of that change/reset(?) after some minutes?

Any advice for debugging this, would be helpful.

Thanks :)

 

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2 Replies
Xilinx Employee
Xilinx Employee
232 Views
Registered: ‎10-30-2017

Re: Custom MPSoC INIT_B holds low

Hi @perencia-wc ,

 

do you have the resister pull up on INIT_B pin? if not then place a pull up on this pin and check once again.

 

Best Regards,
Srikanth
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Participant perencia-wc
Participant
215 Views
Registered: ‎10-03-2017

Re: Custom MPSoC INIT_B holds low

Hi @savula 

Yes, we have the pull up.

In fact, I've checked with the oscilloscope and we get a pulse on INIT_B. Apparently, the raising edge will be caused by the pull up and the falling edge by the fpga asserting the INIT_B at the beginning of the HW configuration. After that, INIT_B never pulls up again. That pulse is about 1.5 ms, so we are powering up the 0V85 rail of the MPSoC and the 1V8 rail of pull up roughly at the same time. 

Apart from that, the automatic reset after some minutes intrigues me.

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