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Observer abhishek7
Observer
2,875 Views
Registered: ‎03-20-2017

How to design an soc on zc702 with both arm and microblaze

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Hi how can i create an soc with both arm and microblaze in a single soc is can you please  help me with some example design.

 

Thanks

regards

Abhishek

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Xilinx Employee
Xilinx Employee
4,808 Views
Registered: ‎07-23-2012

Re: How to design an soc on zc702 with both arm and microblaze

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Yes, to access PS DDR you should use HP ports. Please refer to https://www.xilinx.com/support/documentation/application_notes/xapp1093-amp-bare-metal-microblaze.pdf for guidance
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Moderator
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Registered: ‎11-09-2015

Re: How to design an soc on zc702 with both arm and microblaze

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Hi @abhishek7,

 

Depending on what you are trying to do, it shouldn't be too complicated.

 

Do a design with a Microblaze on the zynq as if it was a FPGA.

 

If you don't use the DDR controller from the zynq (if you use BRAM for the MB), it should be straight forward. If you do, start first with BRAM

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Observer abhishek7
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Registered: ‎03-20-2017

Re: How to design an soc on zc702 with both arm and microblaze

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hi @florentw i have done using with bram but large amount of data as to be stored so i have opted for ddr in zync(arm core) also i have custom ip which uses microblaze with streaming interface..

 

so how to be designed i have done soc and generated bitfile successfully but in sdk am unable to read,write in microblaze local memory and custom ip

 

thanks

 

regards

abhishek

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Moderator
Moderator
2,844 Views
Registered: ‎11-09-2015

Re: How to design an soc on zc702 with both arm and microblaze

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Hi @abhishek7,

 

If you targeting the Microblaze, can you read into its local memory?

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Observer abhishek7
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2,838 Views
Registered: ‎03-20-2017

Re: How to design an soc on zc702 with both arm and microblaze

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no am unable to access the memory of microblaze..
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Observer abhishek7
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2,834 Views
Registered: ‎03-20-2017

Re: How to design an soc on zc702 with both arm and microblaze

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Screenshot-1.png
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Moderator
Moderator
2,824 Views
Registered: ‎11-09-2015

Re: How to design an soc on zc702 with both arm and microblaze

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Hi @abhishek7,

 

Could you try in xsct, to do

mrd address_of_BRAM

 

Check for both targets (targets command). Make sure you can see the MB.

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Observer abhishek7
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2,743 Views
Registered: ‎03-20-2017

Re: How to design an soc on zc702 with both arm and microblaze

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hi @florentw in the present system i dont have bram in the design,currently am working with vivado2015.2 version and i have used targets command in xmd console it shows only arm cortex a9 but no microblaze the following file is attached below.can please help me out 

 

thanks

 

regards

abhishek

xmd_console.PNG
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Moderator
Moderator
2,727 Views
Registered: ‎11-09-2015

Re: How to design an soc on zc702 with both arm and microblaze

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Hi @abhishek7,

 

That could explain a lot. Make sure you are loading the correct bitstream.

 

Regards,

 

Florent


Florent
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Observer abhishek7
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Registered: ‎03-20-2017

Re: How to design an soc on zc702 with both arm and microblaze

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hi @florentw if we use ddr in system,should i enable  slave HP port??

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Moderator
Moderator
2,742 Views
Registered: ‎11-09-2015

Re: How to design an soc on zc702 with both arm and microblaze

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Hi @abhishek7,

 

On the zynq yes.

 

But, as I said, you need to make the microblaze working without going through the DDR before.


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Observer abhishek7
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2,739 Views
Registered: ‎03-20-2017

Re: How to design an soc on zc702 with both arm and microblaze

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hi @florentw thank for the info by using bram its fine but now with ddr hwn i build a system the default address of ddr in zynq is 0x00100000 right,but when i enable HP port,in address editor it is set ddr address is set to 0x20000000  by auto address genrator.so what exactly is the infer for this?

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Moderator
Moderator
2,731 Views
Registered: ‎11-09-2015

Re: How to design an soc on zc702 with both arm and microblaze

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Hi @abhishek7,

 

It depends on what you have in your system. However 0x20000000 is still in the address of the DDR for the AXI_HP port


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Observer abhishek7
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Registered: ‎03-20-2017

Re: How to design an soc on zc702 with both arm and microblaze

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hi @florentw now everything works fine when do mrd,mwr to user ip,ddr,microblaze local memory is working fine but when i use putfsl functions in my code it does not work as i created application project with arm cotex not with microblaze and when i am trying to create application project with microblaze is gives error as this application project requires UART ip in the design but i have uart in arm enabled.can u please help me out.

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Moderator
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Registered: ‎11-09-2015

Re: How to design an soc on zc702 with both arm and microblaze

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Hi @abhishek7,

 

I guess this is because you are reading in the cache and you don't have the same value as in the DDR. You need to invalidated the cache (see here) or to use the ACP port


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Observer abhishek7
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Registered: ‎03-20-2017

Re: How to design an soc on zc702 with both arm and microblaze

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hi @florentw this the code, where am not using data from cache...

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Moderator
Moderator
2,644 Views
Registered: ‎11-09-2015

Re: How to design an soc on zc702 with both arm and microblaze

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Hi @abhishek7,

 

Sorry I misunderstood your previous post.

 

If you do not have an UART, then you cannot do printf...

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Xilinx Employee
Xilinx Employee
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Registered: ‎07-23-2012

Re: How to design an soc on zc702 with both arm and microblaze

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Yes, to access PS DDR you should use HP ports. Please refer to https://www.xilinx.com/support/documentation/application_notes/xapp1093-amp-bare-metal-microblaze.pdf for guidance
-----------------------------------------------------------------------------------------------
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