UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor checkandmate
Visitor
2,066 Views
Registered: ‎05-02-2017

IBERT Eye Diagram Completely Red

Jump to solution

Hi,

 

I have 8 JESD204b lanes coming from an AD9625 (datasheet) ADC running 8 lanes at 6.25Gbps into the GTX ports of a Zynq FPGA (xc7z045ffg676-2). I want to view the RX eye diagram. I am attempting to use IBERT in Vivado with no success. I manage to lock my PLL's and get the line rate to successfully read a line rate of 6.25Gbps. However, when I run a scan I get a completely red eye diagram.

 

 

ADI_1.PNG

 

I have tried many different combinations of RX parameters but I always get a completely red eye. Any possible ideas of the cause of this?

 

Thanks!

Mate

0 Kudos
1 Solution

Accepted Solutions
Highlighted
Explorer
Explorer
3,650 Views
Registered: ‎02-22-2012

Re: IBERT Eye Diagram Completely Red

Jump to solution

Did you set bit PMA_RSV2[5] of your GTX? See UG476 page 209.

 

3 Replies
Highlighted
Explorer
Explorer
3,651 Views
Registered: ‎02-22-2012

Re: IBERT Eye Diagram Completely Red

Jump to solution

Did you set bit PMA_RSV2[5] of your GTX? See UG476 page 209.

 

Visitor checkandmate
Visitor
2,007 Views
Registered: ‎05-02-2017

Re: IBERT Eye Diagram Completely Red

Jump to solution

That did it! My PMA_RSV2 was 0x2050 were PMA_RSV2[5] is then 0. I set the bit to 1 by making PMA_RSV2=2070 and the eye diagram appeared. I seemed to have missed that attribute in ug476, I only checked ES_EYE_SCAN_EN before.

 

Thanks!

0 Kudos
Explorer
Explorer
1,996 Views
Registered: ‎02-22-2012

Re: IBERT Eye Diagram Completely Red

Jump to solution

Glad that it helped.

Been there too :-)

0 Kudos