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Visitor lymanhorne
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Registered: ‎08-07-2013

Interrupts from AXI DMA in Scatter/Gather mode

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I refer to the PG021 document “LogiCORE IP AXI DMA v7.1 Product Guide” of April 2, 2014.

 

Pg. 28, table 2-16 says that the IOC_Irq bit, in scatter-gather mode, only gets set when the DMA engine sees a descriptor with the End of Frame bit set.

Pg. 38, table 2-29 says that the End of Frame bit in a descriptor only applies when the the DMA is configured in Micro DMA mode.

 

So, how do you get DMA completion interrupts (IOC interrupts) in scatter-gather mode when you’re not using Micro DMA? Is this an error in the product guide?

 

Also, is it possible to get IOC interrupts in Cyclic BD mode?

 

Unable to get interrupts from the DMA. Interrupts from other sources are working.

 

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Xilinx Employee
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Registered: ‎08-02-2011

Re: Interrupts from AXI DMA in Scatter/Gather mode

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Hey Lyman,

Sure thing! Yes, you should drive tlast appropriately, even if your data is just streaming and not packetized.
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Visitor lymanhorne
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Registered: ‎08-07-2013

Re: Interrupts from AXI DMA in Scatter/Gather mode

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"Unable to get interrupts from the DMA" is not strictly correct. Interrupts do occur in micro-DMA mode. They do not occur when micro-DMA mode is not enabled. Our data rate is fairly high and micro-DMA mode is not an option.

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2011

Re: Interrupts from AXI DMA in Scatter/Gather mode

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Hmmm. I understand the confusion.

In non-micro mode, the EOF bit gets set in the status register of the descriptor automatically by the DMA engine when it sees a s2mm_tlast assertion. This triggers an interrupt event on the IOC_Irq in the status register of the DMA engine (assuming it has been enabled, threshold has been met, and delay timer has been met).

I've never used micro mode, so I'm not sure the purpose of the RXEOF bit in the S2MM_CONTROL register of the descriptor (i.e. pg 38)

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2011

Re: Interrupts from AXI DMA in Scatter/Gather mode

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On second thought. I am guessing the purpose of the RXEOF bit in the S2MM control register is because the datamover (underlying core inside the DMA) has an optional setting called 'Indeterminate BTT' mode for S2MM that is used when the number of bytes to transfer is unknown.

I suspect this mode is used for normal non-Micro mode and the AXI DMA sets the RXEOF bit in the status register dynamically.

By contrast, micro mode disables Indeterminate BTT setting and expects the user to explicitly state the number of bytes to transfer.

This is all done to save resources for micro mode.

I will confirm this.
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Visitor lymanhorne
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Registered: ‎08-07-2013

Re: Interrupts from AXI DMA in Scatter/Gather mode

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bwiec, thanks for your reply.

 

You say, "...the EOF bit gets set in the status register of the descriptor automatically by the DMA engine when it sees a s2mm_tlast assertion"

 

So perhaps this means I need to drive the tlast on the streaming side of the DMA? This may be the issue. We are using only the S2MM function, and there is no physical meaning on the streaming side for tlast, but I could implement a counter and drive tlast high periodically. I will try that.

 

Thanks,

Lyman Horne

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2011

Re: Interrupts from AXI DMA in Scatter/Gather mode

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Hey Lyman,

Sure thing! Yes, you should drive tlast appropriately, even if your data is just streaming and not packetized.
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