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Visitor achen58
Visitor
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Registered: ‎02-24-2019

LVDS Interface

My design is create an LVDS interface to capture data(14 bits) in parallel from an ADC sampled at 300Mhz(system clock freq). I am to store the data captured to the on-chip memory of the KCU105, which I would assume to be using some sort of BRAM. I am stuck on how to approach this design, I believe I am suppose to use the Vivado IP Integrator tool for this design.  

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