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Observer akhilahmed
Registered: ‎10-21-2018

Microblaze with AXI Quad SPI core

Hi, I am creating a project to store user data in flash memory in ZCU104 board. I have been able to use the PS QSPI controller to perform read and write operations successfully. However, I need to use Microblaze instead of the Zynq PS. 

When I try to add an AXI Quad SPI IP to the block diagram and assign the SPI interface to the pins mentioned in Table 3-6 in the user guide (snapshot for reference), I don't see the pins A25, C24, B24, E25, A24 or D25 in the IO Planning window. 

Please explain me the procedure to connect the AXI Quad SPI to the QSPI flash memory on the board.

Also, please provide a reference to an example that describes the complete flow for using flash memory with Microblaze (Vivado + SDK project) if there is one.

Thank you,

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Observer akhilahmed
Registered: ‎10-21-2018

Re: Microblaze with AXI Quad SPI core


I did some more research and figured out that I cannot route these MIO signals to the logic in PL. However, I should still be able to access the onboard Flash memory by connecting the QSPI controller in the PS to the MIO, and creating an AXI interface from the Microblaze in PL to the PS. 

I found this technique discussed in https://forums.xilinx.com/t5/UltraScale-Architecture/Can-I-access-the-PS-QSPI-Pins-from-the-PL/td-p/740065 and the solution refers to AR#50869

I wanted to refer to the XPS project, but it looks like the project was not completely uploaded. The XPS project archive is only 14KB. It would be highly appreciable if someone could fix and upload the complete XPS project. 

Thank you!

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