09-10-2013 10:12 AM
I want to transfer data from 3 of the HP ports on my ZC706 board via the AXI DMA Engine to my custom peripheral. I currently am able to successfully transfer data to and from the peripheral using one AXI DMA connected to one HP port. From reading the document, I understand that I cannot have one DMA instances tap into the three ports, I would need one for each. However, what about the other end? Do I also need three different custom peripherals? Or is there a way to connect the three DMAs to three different instances of the same peripheral? I tried the latter but the MPD file taht contains the port labels causes problems. The documentation here
says that I can have Snn_port_name, where the "nn" is 00-15 if there are multiple peripherals. But if I manually try to change the port in the MPD from S_AXIS_TDATA to S00_AXIS_TDATA, it makes this change for ALL instances because it is the same peripheral. So does that mean I need three different peripherals created using the Wizard?
09-10-2013 10:27 AM
I don't really understand what you're trying to achieve. Perhaps post a rough block diagram?
However, do note that the DMA does have a multi channel mode.
if I manually try to change the port in the MPD from S_AXIS_TDATA to S00_AXIS_TDATA
Don't do that. You should not be manually editing .mpd files for the Xilinx cores.
PG085 is generic. For more specific info about the AXI DMA, you should refer to PG021.
09-10-2013 10:56 AM
Thanks for your response bwiec.
I have included a block diagram.
As you can see, I am asking whether we can do what is shown in the left diagram or do I have to create three different IPs in the Create or Import Custom Peripheral Wizard and connect them to each DMA, as in the one on the right?
Regarding manually editing the .mpd files, we have to do that because we want to use AXI4-Lite and AXI4-Stream ports in the same peripheral and I haven't found out yet how to do that using the tools. When we try to create a peripheral using the Wizard, the section where it asks us to select the type of AXI protocol, they are radio buttons and we can only select one of them, not more. So we create a AXI4-Lite peripheral, one (temporary) AXI4-Stream peripheral and then copy over the port and parameter definitions from the Stream peripheral's MPD. We also similarly copy over the labels from our design's mhs. Then when we create a top module, we simply edit in the ports for the AXI4-Stream in the vhdl top_module and the verilog user_logic. Is there a simpler way to get both AXI4-Lite and Stream ports into a simgle custom IP?
09-10-2013 11:17 AM
Also, as an additional note, if I want to use the multi-channel mode, I need to enable Scatter/Gather mode which we do not want to because we want to keep as much free space in the FPGA as possible for our own hardware.
Also, we don't need SG because we initialize CMA in linux at boot time and since we can only transfer 8MB max from the DMA per transaction, CMA'ing a 8MB chunk works fine for us.