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Explorer
Explorer
6,870 Views
Registered: ‎03-23-2015

PJTAG through EMIO gives critical warning

Hello,

 

I have a design where I have selected to output the PJTAG (comming from the PS7) through the fabric (EMIO). Everything is fine and I can synthesize, implement and generate bitstream. However, I get a critical warning like this:

 

CRITICAL WARNING: [Vivado 12-1387] No valid object(s) found for set_output_delay constraint with option '-clock [get_clocks PJTAG_TCK]'. [z:/projects/x/y/top/vivado/x_y.srcs/sources_1/bd/z_top/ip/z_top_processing_system7_0/z_top_processing_system7_0.xdc:22]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-627] No clocks matched 'PJTAG_TCK'. 

 

If I go to the file and line specified, which is an auto-generated constraints file for the PS7 it reads (I'm only copying the relevant part):

 

############################################################################
# PJTAG constraints                                                        #
############################################################################
set_output_delay -clock [get_clocks PJTAG_TCK] -clock_fall -min -6.000 [get_ports PJTAG_TDO]
set_output_delay -clock [get_clocks PJTAG_TCK] -clock_fall -max 15.000 [get_ports PJTAG_TDO]
set_output_delay -clock [get_clocks PJTAG_TCK] -clock_fall -min 6.000 [get_ports PJTAG_TDO]
set_output_delay -clock [get_clocks PJTAG_TCK] -clock_fall -max 15.000 [get_ports PJTAG_TDO]

As the critical warning states there is no clock declared named PJTAG_TCK (if after synthesizing i run get_clocks *, it is not present in the list).

 

I think that when the PJTAG is routed through the MIO no constraints are necessary since it is a dedicated PS7 net, however, since I am routing it through the fabric I understand I should properly constrain it... and I think that this is what this XDC file is actually trying to do. However I don't understand how come the clock is not created before... I mean the output delays are set to specific times, so the frecuency is somehow assumed I understand, why not create the clock then? Am I supposed to create it myself? if so, when I run a "report_compilation_order -constraints" I see the file in question is ran as "EARLY" an therefore before my constraints, am I supposed to create a new constraint file and make it run even earlier than this one just to create the clock?

 

Finally and less important I also don't see the point in the constraints I pasted avobe, the second and fourth one are exactly the same and the other two only differ in a sign... I am no constraints expert but I think something is no right here.

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9 Replies
Explorer
Explorer
6,846 Views
Registered: ‎03-23-2015

Re: PJTAG through EMIO gives critical warning

Please somebody help... :(

 

Am I really the only one who has come across this?

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Moderator
Moderator
6,836 Views
Registered: ‎07-31-2012

Re: PJTAG through EMIO gives critical warning

Hi arquer,

 

This is quite strange critical warning. But yes you can try these steps to resolve this issue.

1)  Reset the output products of block design and regenerate them (OR) re-create the block design.

2)  Make PJTAG as external port

3) Create the toplevel HDL wrapper. In this comment out  "--    PJTAG_td_t : out STD_LOGIC;" which I guess you dont need and declare as signal.

2) Add the attached zc702 PJTAG constraints file because you are routing through EMIO.

 

The design should then generate bitstream without critical warning.

 

In ..\<project_name>\<project_name>.srcs\sources_1\bd\<block_design_name> directory you will find .xdc something like the auto clock declared as below

create_clock -name PJTAG_tck -period 10 [get_ports PJTAG_tck]
create_clock -name processing_system7_0_FCLK_CLK0 -period 20 [get_pins processing_system7_0/FCLK_CLK0]

 

 

Regards

Praveen

 

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Explorer
Explorer
6,822 Views
Registered: ‎03-23-2015

Re: PJTAG through EMIO gives critical warning

Hi Praveen,

 

thanks for your reply. 

 

However, I have re-generated the desing, reset and re-generate output products numerous times and the critical warning persistently appers always.

 

Also, I think the PJTAG_TD_T is no longer generated I think, right? I think now you get TDO and TDI, I guess if you want to multipex them into a IO pin it's up to you. Whatever the case, I am using TDO and TDI and I have not seen any TD_T signal anywhere.

 

Another thing, I have noticed that the constraints you mentioned (the create_clocks) do appear but they only appear in the 

.\<project_name>\<project_name>.srcs\sources_1\bd\<block_design_name>\<block_design_name>_ooc.xdc file... as it says in the header, that file is not used in the normal top-down synthesis/implementation... I wonder if I should somehow copy those constraints or assign some property to the ooc file so that it does get processed... I mean.. that BD is my top module.. so I wonder if the user is supposed to enable those OOC constraints for normal compilation in that case...

 

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Moderator
Moderator
6,794 Views
Registered: ‎07-31-2012

Re: PJTAG through EMIO gives critical warning

Hi,

 

Could you tell me which version of software tool you are using? 

Also, would it be possible to share the project and the bd tcl script with me?

 

Regards

Praveen


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Explorer
Explorer
5,696 Views
Registered: ‎11-28-2011

Re: PJTAG through EMIO gives critical warning

Any resolution on this?  We have a design that we know works in hardware, so it places and routes, but still get these critical errors. Running 2015.3. 

Tags (3)
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Adventurer
Adventurer
2,357 Views
Registered: ‎06-27-2016

Re: PJTAG through EMIO gives critical warning

Hi,

 

Any solution you found? 

Please let me know.

I'm also getting same warning in 2016.4. I tried to comment the xdc line which was throwing warning and added them to top xdc, still no luck. 

 

Thank-you.

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Contributor
Contributor
2,349 Views
Registered: ‎03-22-2017

Re: PJTAG through EMIO gives critical warning

I have the same error messages, I'm also working with 2016.4 version of Vivado. It would also help me out.

Thanks
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Adventurer
Adventurer
2,156 Views
Registered: ‎02-19-2016

Re: PJTAG through EMIO gives critical warning

I believe the issue is that the constraints are all upper-case, however the ports have lower case letters (IE: PJTAG_TCK vs PJTAG_tck) even though when looking at the port properties they appear as all upper case.  I tried deleting the PJTAG bus and settings the ports individually as external (in block diagram) however this didn't fix the issue.

 

 

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Visitor mathild_7
Visitor
83 Views
Registered: ‎01-23-2019

Re: PJTAG through EMIO gives critical warning

Anyone solve this? I have a feeling its either
A) specific to 2017.2  

OR

B) specific to when you upgrade from a version older than 2017.2

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